12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
2b8b572e1SStephen Rothwell #ifndef __ASM_POWERPC_PCI_H
3b8b572e1SStephen Rothwell #define __ASM_POWERPC_PCI_H
4b8b572e1SStephen Rothwell #ifdef __KERNEL__
5b8b572e1SStephen Rothwell
6b8b572e1SStephen Rothwell /*
7b8b572e1SStephen Rothwell */
8b8b572e1SStephen Rothwell
9b8b572e1SStephen Rothwell #include <linux/types.h>
10b8b572e1SStephen Rothwell #include <linux/slab.h>
11b8b572e1SStephen Rothwell #include <linux/string.h>
120a0f0d8bSChristoph Hellwig #include <linux/dma-map-ops.h>
1384be456fSChristoph Hellwig #include <linux/scatterlist.h>
14b8b572e1SStephen Rothwell
15b8b572e1SStephen Rothwell #include <asm/machdep.h>
16b8b572e1SStephen Rothwell #include <asm/io.h>
17b8b572e1SStephen Rothwell #include <asm/pci-bridge.h>
18b8b572e1SStephen Rothwell
19467efc2eSDaniel Axtens /* Return values for pci_controller_ops.probe_mode function */
20467efc2eSDaniel Axtens #define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
21467efc2eSDaniel Axtens #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
22467efc2eSDaniel Axtens #define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
23467efc2eSDaniel Axtens
24b8b572e1SStephen Rothwell #define PCIBIOS_MIN_IO 0x1000
25b8b572e1SStephen Rothwell #define PCIBIOS_MIN_MEM 0x10000000
26b8b572e1SStephen Rothwell
27b8b572e1SStephen Rothwell /* Values for the `which' argument to sys_pciconfig_iobase syscall. */
28b8b572e1SStephen Rothwell #define IOBASE_BRIDGE_NUMBER 0
29b8b572e1SStephen Rothwell #define IOBASE_MEMORY 1
30b8b572e1SStephen Rothwell #define IOBASE_IO 2
31b8b572e1SStephen Rothwell #define IOBASE_ISA_IO 3
32b8b572e1SStephen Rothwell #define IOBASE_ISA_MEM 4
33b8b572e1SStephen Rothwell
34b8b572e1SStephen Rothwell /*
35b8b572e1SStephen Rothwell * Set this to 1 if you want the kernel to re-assign all PCI
36b8b572e1SStephen Rothwell * bus numbers (don't do that on ppc64 yet !)
37b8b572e1SStephen Rothwell */
387fe519c2SJosh Boyer #define pcibios_assign_all_busses() \
390e47ff1cSRob Herring (pci_has_flag(PCI_REASSIGN_ALL_BUS))
40b8b572e1SStephen Rothwell
pci_get_legacy_ide_irq(struct pci_dev * dev,int channel)41b8b572e1SStephen Rothwell static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
42b8b572e1SStephen Rothwell {
43b8b572e1SStephen Rothwell if (ppc_md.pci_get_legacy_ide_irq)
44b8b572e1SStephen Rothwell return ppc_md.pci_get_legacy_ide_irq(dev, channel);
45b8b572e1SStephen Rothwell return channel ? 15 : 14;
46b8b572e1SStephen Rothwell }
47b8b572e1SStephen Rothwell
484fc665b8SBecky Bruce #ifdef CONFIG_PCI
49d276960dSNick Child void __init set_pci_dma_ops(const struct dma_map_ops *dma_ops);
504fc665b8SBecky Bruce #else /* CONFIG_PCI */
514fc665b8SBecky Bruce #define set_pci_dma_ops(d)
524fc665b8SBecky Bruce #endif
534fc665b8SBecky Bruce
54b8b572e1SStephen Rothwell #ifdef CONFIG_PPC64
55b8b572e1SStephen Rothwell
56b8b572e1SStephen Rothwell /*
57b8b572e1SStephen Rothwell * We want to avoid touching the cacheline size or MWI bit.
58b8b572e1SStephen Rothwell * pSeries firmware sets the cacheline size (which is not the cpu cacheline
59b8b572e1SStephen Rothwell * size in all cases) and hardware treats MWI the same as memory write.
60b8b572e1SStephen Rothwell */
61b8b572e1SStephen Rothwell #define PCI_DISABLE_MWI
62b8b572e1SStephen Rothwell
63b8b572e1SStephen Rothwell #endif /* CONFIG_PPC64 */
64b8b572e1SStephen Rothwell
65b8b572e1SStephen Rothwell extern int pci_domain_nr(struct pci_bus *bus);
66b8b572e1SStephen Rothwell
67b8b572e1SStephen Rothwell /* Decide whether to display the domain number in /proc */
68b8b572e1SStephen Rothwell extern int pci_proc_domain(struct pci_bus *bus);
69b8b572e1SStephen Rothwell
70b8b572e1SStephen Rothwell struct vm_area_struct;
71b8b572e1SStephen Rothwell
7228f8f183SDavid Woodhouse /* Tell PCI code what kind of PCI resource mappings we support */
73b8b572e1SStephen Rothwell #define HAVE_PCI_MMAP 1
7428f8f183SDavid Woodhouse #define ARCH_GENERIC_PCI_MMAP_RESOURCE 1
75e854d8b2SDavid Woodhouse #define arch_can_pci_mmap_io() 1
76ae749c7aSDavid Woodhouse #define arch_can_pci_mmap_wc() 1
77b8b572e1SStephen Rothwell
78e9f82cb7SBenjamin Herrenschmidt extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
79e9f82cb7SBenjamin Herrenschmidt size_t count);
80e9f82cb7SBenjamin Herrenschmidt extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
81e9f82cb7SBenjamin Herrenschmidt size_t count);
82e9f82cb7SBenjamin Herrenschmidt extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
83e9f82cb7SBenjamin Herrenschmidt struct vm_area_struct *vma,
84e9f82cb7SBenjamin Herrenschmidt enum pci_mmap_state mmap_state);
85*54f30b83SArnd Bergmann extern void pci_adjust_legacy_attr(struct pci_bus *bus,
86*54f30b83SArnd Bergmann enum pci_mmap_state mmap_type);
87e9f82cb7SBenjamin Herrenschmidt #define HAVE_PCI_LEGACY 1
88e9f82cb7SBenjamin Herrenschmidt
89b8b572e1SStephen Rothwell extern void pcibios_claim_one_bus(struct pci_bus *b);
90b8b572e1SStephen Rothwell
91fd6852c8SBenjamin Herrenschmidt extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
92e90a1318SNathan Fontenot
93b8b572e1SStephen Rothwell extern void pcibios_resource_survey(void);
94b8b572e1SStephen Rothwell
95b8b572e1SStephen Rothwell extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
96fd6852c8SBenjamin Herrenschmidt extern int remove_phb_dynamic(struct pci_controller *phb);
97b8b572e1SStephen Rothwell
98b8b572e1SStephen Rothwell extern struct pci_dev *of_create_pci_dev(struct device_node *node,
99b8b572e1SStephen Rothwell struct pci_bus *bus, int devfn);
100b8b572e1SStephen Rothwell
101fc5f6221SBryant G. Ly extern unsigned int pci_parse_of_flags(u32 addr0, int bridge);
102fc5f6221SBryant G. Ly
10398d9f30cSBenjamin Herrenschmidt extern void of_scan_pci_bridge(struct pci_dev *dev);
104b8b572e1SStephen Rothwell
105b8b572e1SStephen Rothwell extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
1068b8da358SBenjamin Herrenschmidt extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
107b8b572e1SStephen Rothwell
108b8b572e1SStephen Rothwell struct file;
109b8b572e1SStephen Rothwell extern pgprot_t pci_phys_mem_access_prot(struct file *file,
110b8b572e1SStephen Rothwell unsigned long pfn,
111b8b572e1SStephen Rothwell unsigned long size,
112b8b572e1SStephen Rothwell pgprot_t prot);
113b8b572e1SStephen Rothwell
11438973ba7SBjorn Helgaas extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose);
1158b8da358SBenjamin Herrenschmidt extern void pcibios_setup_bus_self(struct pci_bus *bus);
1160ed2c722SGrant Likely extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
117b5d937deSGrant Likely extern void pcibios_scan_phb(struct pci_controller *hose);
118e9f82cb7SBenjamin Herrenschmidt
119b8b572e1SStephen Rothwell #endif /* __KERNEL__ */
1205d2aa710SAlistair Popple
121b8b572e1SStephen Rothwell #endif /* __ASM_POWERPC_PCI_H */
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