xref: /openbmc/linux/arch/powerpc/include/asm/paca.h (revision 407e7517)
1 /*
2  * This control block defines the PACA which defines the processor
3  * specific data for each logical processor on the system.
4  * There are some pointers defined that are utilized by PLIC.
5  *
6  * C 2001 PPC 64 Team, IBM Corp
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * as published by the Free Software Foundation; either version
11  * 2 of the License, or (at your option) any later version.
12  */
13 #ifndef _ASM_POWERPC_PACA_H
14 #define _ASM_POWERPC_PACA_H
15 #ifdef __KERNEL__
16 
17 #ifdef CONFIG_PPC64
18 
19 #include <linux/string.h>
20 #include <asm/types.h>
21 #include <asm/lppaca.h>
22 #include <asm/mmu.h>
23 #include <asm/page.h>
24 #ifdef CONFIG_PPC_BOOK3E
25 #include <asm/exception-64e.h>
26 #else
27 #include <asm/exception-64s.h>
28 #endif
29 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
30 #include <asm/kvm_book3s_asm.h>
31 #endif
32 #include <asm/accounting.h>
33 #include <asm/hmi.h>
34 #include <asm/cpuidle.h>
35 
36 register struct paca_struct *local_paca asm("r13");
37 
38 #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
39 extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
40 /*
41  * Add standard checks that preemption cannot occur when using get_paca():
42  * otherwise the paca_struct it points to may be the wrong one just after.
43  */
44 #define get_paca()	((void) debug_smp_processor_id(), local_paca)
45 #else
46 #define get_paca()	local_paca
47 #endif
48 
49 #define get_lppaca()	(get_paca()->lppaca_ptr)
50 #define get_slb_shadow()	(get_paca()->slb_shadow_ptr)
51 
52 struct task_struct;
53 
54 /*
55  * Defines the layout of the paca.
56  *
57  * This structure is not directly accessed by firmware or the service
58  * processor.
59  */
60 struct paca_struct {
61 #ifdef CONFIG_PPC_BOOK3S
62 	/*
63 	 * Because hw_cpu_id, unlike other paca fields, is accessed
64 	 * routinely from other CPUs (from the IRQ code), we stick to
65 	 * read-only (after boot) fields in the first cacheline to
66 	 * avoid cacheline bouncing.
67 	 */
68 
69 	struct lppaca *lppaca_ptr;	/* Pointer to LpPaca for PLIC */
70 #endif /* CONFIG_PPC_BOOK3S */
71 	/*
72 	 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
73 	 * load lock_token and paca_index with a single lwz
74 	 * instruction.  They must travel together and be properly
75 	 * aligned.
76 	 */
77 #ifdef __BIG_ENDIAN__
78 	u16 lock_token;			/* Constant 0x8000, used in locks */
79 	u16 paca_index;			/* Logical processor number */
80 #else
81 	u16 paca_index;			/* Logical processor number */
82 	u16 lock_token;			/* Constant 0x8000, used in locks */
83 #endif
84 
85 	u64 kernel_toc;			/* Kernel TOC address */
86 	u64 kernelbase;			/* Base address of kernel */
87 	u64 kernel_msr;			/* MSR while running in kernel */
88 	void *emergency_sp;		/* pointer to emergency stack */
89 	u64 data_offset;		/* per cpu data offset */
90 	s16 hw_cpu_id;			/* Physical processor number */
91 	u8 cpu_start;			/* At startup, processor spins until */
92 					/* this becomes non-zero. */
93 	u8 kexec_state;		/* set when kexec down has irqs off */
94 #ifdef CONFIG_PPC_BOOK3S_64
95 	struct slb_shadow *slb_shadow_ptr;
96 	struct dtl_entry *dispatch_log;
97 	struct dtl_entry *dispatch_log_end;
98 #endif
99 	u64 dscr_default;		/* per-CPU default DSCR */
100 
101 #ifdef CONFIG_PPC_BOOK3S_64
102 	/*
103 	 * Now, starting in cacheline 2, the exception save areas
104 	 */
105 	/* used for most interrupts/exceptions */
106 	u64 exgen[EX_SIZE] __attribute__((aligned(0x80)));
107 	u64 exslb[EX_SIZE];	/* used for SLB/segment table misses
108  				 * on the linear mapping */
109 	/* SLB related definitions */
110 	u16 vmalloc_sllp;
111 	u16 slb_cache_ptr;
112 	u32 slb_cache[SLB_CACHE_ENTRIES];
113 #endif /* CONFIG_PPC_BOOK3S_64 */
114 
115 #ifdef CONFIG_PPC_BOOK3E
116 	u64 exgen[8] __aligned(0x40);
117 	/* Keep pgd in the same cacheline as the start of extlb */
118 	pgd_t *pgd __aligned(0x40); /* Current PGD */
119 	pgd_t *kernel_pgd;		/* Kernel PGD */
120 
121 	/* Shared by all threads of a core -- points to tcd of first thread */
122 	struct tlb_core_data *tcd_ptr;
123 
124 	/*
125 	 * We can have up to 3 levels of reentrancy in the TLB miss handler,
126 	 * in each of four exception levels (normal, crit, mcheck, debug).
127 	 */
128 	u64 extlb[12][EX_TLB_SIZE / sizeof(u64)];
129 	u64 exmc[8];		/* used for machine checks */
130 	u64 excrit[8];		/* used for crit interrupts */
131 	u64 exdbg[8];		/* used for debug interrupts */
132 
133 	/* Kernel stack pointers for use by special exceptions */
134 	void *mc_kstack;
135 	void *crit_kstack;
136 	void *dbg_kstack;
137 
138 	struct tlb_core_data tcd;
139 #endif /* CONFIG_PPC_BOOK3E */
140 
141 #ifdef CONFIG_PPC_BOOK3S
142 	mm_context_id_t mm_ctx_id;
143 #ifdef CONFIG_PPC_MM_SLICES
144 	u64 mm_ctx_low_slices_psize;
145 	unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
146 	unsigned long mm_ctx_slb_addr_limit;
147 #else
148 	u16 mm_ctx_user_psize;
149 	u16 mm_ctx_sllp;
150 #endif
151 #endif
152 
153 	/*
154 	 * then miscellaneous read-write fields
155 	 */
156 	struct task_struct *__current;	/* Pointer to current */
157 	u64 kstack;			/* Saved Kernel stack addr */
158 	u64 stab_rr;			/* stab/slb round-robin counter */
159 	u64 saved_r1;			/* r1 save for RTAS calls or PM */
160 	u64 saved_msr;			/* MSR saved here by enter_rtas */
161 	u16 trap_save;			/* Used when bad stack is encountered */
162 	u8 irq_soft_mask;		/* mask for irq soft masking */
163 	u8 irq_happened;		/* irq happened while soft-disabled */
164 	u8 io_sync;			/* writel() needs spin_unlock sync */
165 	u8 irq_work_pending;		/* IRQ_WORK interrupt while soft-disable */
166 	u8 nap_state_lost;		/* NV GPR values lost in power7_idle */
167 	u64 sprg_vdso;			/* Saved user-visible sprg */
168 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
169 	u64 tm_scratch;                 /* TM scratch area for reclaim */
170 #endif
171 
172 #ifdef CONFIG_PPC_POWERNV
173 	/* Per-core mask tracking idle threads and a lock bit-[L][TTTTTTTT] */
174 	u32 *core_idle_state_ptr;
175 	u8 thread_idle_state;		/* PNV_THREAD_RUNNING/NAP/SLEEP	*/
176 	/* Mask to indicate thread id in core */
177 	u8 thread_mask;
178 	/* Mask to denote subcore sibling threads */
179 	u8 subcore_sibling_mask;
180 	/*
181 	 * Pointer to an array which contains pointer
182 	 * to the sibling threads' paca.
183 	 */
184 	struct paca_struct **thread_sibling_pacas;
185 	/* The PSSCR value that the kernel requested before going to stop */
186 	u64 requested_psscr;
187 
188 	/*
189 	 * Save area for additional SPRs that need to be
190 	 * saved/restored during cpuidle stop.
191 	 */
192 	struct stop_sprs stop_sprs;
193 #endif
194 
195 #ifdef CONFIG_PPC_BOOK3S_64
196 	/* Non-maskable exceptions that are not performance critical */
197 	u64 exnmi[EX_SIZE];	/* used for system reset (nmi) */
198 	u64 exmc[EX_SIZE];	/* used for machine checks */
199 #endif
200 #ifdef CONFIG_PPC_BOOK3S_64
201 	/* Exclusive stacks for system reset and machine check exception. */
202 	void *nmi_emergency_sp;
203 	void *mc_emergency_sp;
204 
205 	u16 in_nmi;			/* In nmi handler */
206 
207 	/*
208 	 * Flag to check whether we are in machine check early handler
209 	 * and already using emergency stack.
210 	 */
211 	u16 in_mce;
212 	u8 hmi_event_available;		/* HMI event is available */
213 	u8 hmi_p9_special_emu;		/* HMI P9 special emulation */
214 #endif
215 
216 	/* Stuff for accurate time accounting */
217 	struct cpu_accounting_data accounting;
218 	u64 dtl_ridx;			/* read index in dispatch log */
219 	struct dtl_entry *dtl_curr;	/* pointer corresponding to dtl_ridx */
220 
221 #ifdef CONFIG_KVM_BOOK3S_HANDLER
222 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
223 	/* We use this to store guest state in */
224 	struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
225 #endif
226 	struct kvmppc_host_state kvm_hstate;
227 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
228 	/*
229 	 * Bitmap for sibling subcore status. See kvm/book3s_hv_ras.c for
230 	 * more details
231 	 */
232 	struct sibling_subcore_state *sibling_subcore_state;
233 #endif
234 #endif
235 #ifdef CONFIG_PPC_BOOK3S_64
236 	/*
237 	 * rfi fallback flush must be in its own cacheline to prevent
238 	 * other paca data leaking into the L1d
239 	 */
240 	u64 exrfi[EX_SIZE] __aligned(0x80);
241 	void *rfi_flush_fallback_area;
242 	u64 l1d_flush_size;
243 #endif
244 };
245 
246 extern void copy_mm_to_paca(struct mm_struct *mm);
247 extern struct paca_struct *paca;
248 extern void initialise_paca(struct paca_struct *new_paca, int cpu);
249 extern void setup_paca(struct paca_struct *new_paca);
250 extern void allocate_pacas(void);
251 extern void free_unused_pacas(void);
252 
253 #else /* CONFIG_PPC64 */
254 
255 static inline void allocate_pacas(void) { };
256 static inline void free_unused_pacas(void) { };
257 
258 #endif /* CONFIG_PPC64 */
259 
260 #endif /* __KERNEL__ */
261 #endif /* _ASM_POWERPC_PACA_H */
262