xref: /openbmc/linux/arch/powerpc/include/asm/paca.h (revision 3c6a73cc)
1 /*
2  * This control block defines the PACA which defines the processor
3  * specific data for each logical processor on the system.
4  * There are some pointers defined that are utilized by PLIC.
5  *
6  * C 2001 PPC 64 Team, IBM Corp
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * as published by the Free Software Foundation; either version
11  * 2 of the License, or (at your option) any later version.
12  */
13 #ifndef _ASM_POWERPC_PACA_H
14 #define _ASM_POWERPC_PACA_H
15 #ifdef __KERNEL__
16 
17 #ifdef CONFIG_PPC64
18 
19 #include <asm/types.h>
20 #include <asm/lppaca.h>
21 #include <asm/mmu.h>
22 #include <asm/page.h>
23 #include <asm/exception-64e.h>
24 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
25 #include <asm/kvm_book3s_asm.h>
26 #endif
27 
28 register struct paca_struct *local_paca asm("r13");
29 
30 #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
31 extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
32 /*
33  * Add standard checks that preemption cannot occur when using get_paca():
34  * otherwise the paca_struct it points to may be the wrong one just after.
35  */
36 #define get_paca()	((void) debug_smp_processor_id(), local_paca)
37 #else
38 #define get_paca()	local_paca
39 #endif
40 
41 #define get_lppaca()	(get_paca()->lppaca_ptr)
42 #define get_slb_shadow()	(get_paca()->slb_shadow_ptr)
43 
44 struct task_struct;
45 struct opal_machine_check_event;
46 
47 /*
48  * Defines the layout of the paca.
49  *
50  * This structure is not directly accessed by firmware or the service
51  * processor.
52  */
53 struct paca_struct {
54 #ifdef CONFIG_PPC_BOOK3S
55 	/*
56 	 * Because hw_cpu_id, unlike other paca fields, is accessed
57 	 * routinely from other CPUs (from the IRQ code), we stick to
58 	 * read-only (after boot) fields in the first cacheline to
59 	 * avoid cacheline bouncing.
60 	 */
61 
62 	struct lppaca *lppaca_ptr;	/* Pointer to LpPaca for PLIC */
63 #endif /* CONFIG_PPC_BOOK3S */
64 	/*
65 	 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
66 	 * load lock_token and paca_index with a single lwz
67 	 * instruction.  They must travel together and be properly
68 	 * aligned.
69 	 */
70 #ifdef __BIG_ENDIAN__
71 	u16 lock_token;			/* Constant 0x8000, used in locks */
72 	u16 paca_index;			/* Logical processor number */
73 #else
74 	u16 paca_index;			/* Logical processor number */
75 	u16 lock_token;			/* Constant 0x8000, used in locks */
76 #endif
77 
78 	u64 kernel_toc;			/* Kernel TOC address */
79 	u64 kernelbase;			/* Base address of kernel */
80 	u64 kernel_msr;			/* MSR while running in kernel */
81 	void *emergency_sp;		/* pointer to emergency stack */
82 	u64 data_offset;		/* per cpu data offset */
83 	s16 hw_cpu_id;			/* Physical processor number */
84 	u8 cpu_start;			/* At startup, processor spins until */
85 					/* this becomes non-zero. */
86 	u8 kexec_state;		/* set when kexec down has irqs off */
87 #ifdef CONFIG_PPC_STD_MMU_64
88 	struct slb_shadow *slb_shadow_ptr;
89 	struct dtl_entry *dispatch_log;
90 	struct dtl_entry *dispatch_log_end;
91 #endif /* CONFIG_PPC_STD_MMU_64 */
92 	u64 dscr_default;		/* per-CPU default DSCR */
93 
94 #ifdef CONFIG_PPC_STD_MMU_64
95 	/*
96 	 * Now, starting in cacheline 2, the exception save areas
97 	 */
98 	/* used for most interrupts/exceptions */
99 	u64 exgen[13] __attribute__((aligned(0x80)));
100 	u64 exmc[13];		/* used for machine checks */
101 	u64 exslb[13];		/* used for SLB/segment table misses
102  				 * on the linear mapping */
103 	/* SLB related definitions */
104 	u16 vmalloc_sllp;
105 	u16 slb_cache_ptr;
106 	u32 slb_cache[SLB_CACHE_ENTRIES];
107 #endif /* CONFIG_PPC_STD_MMU_64 */
108 
109 #ifdef CONFIG_PPC_BOOK3E
110 	u64 exgen[8] __attribute__((aligned(0x80)));
111 	/* Keep pgd in the same cacheline as the start of extlb */
112 	pgd_t *pgd __attribute__((aligned(0x80))); /* Current PGD */
113 	pgd_t *kernel_pgd;		/* Kernel PGD */
114 
115 	/* Shared by all threads of a core -- points to tcd of first thread */
116 	struct tlb_core_data *tcd_ptr;
117 
118 	/*
119 	 * We can have up to 3 levels of reentrancy in the TLB miss handler,
120 	 * in each of four exception levels (normal, crit, mcheck, debug).
121 	 */
122 	u64 extlb[12][EX_TLB_SIZE / sizeof(u64)];
123 	u64 exmc[8];		/* used for machine checks */
124 	u64 excrit[8];		/* used for crit interrupts */
125 	u64 exdbg[8];		/* used for debug interrupts */
126 
127 	/* Kernel stack pointers for use by special exceptions */
128 	void *mc_kstack;
129 	void *crit_kstack;
130 	void *dbg_kstack;
131 
132 	struct tlb_core_data tcd;
133 #endif /* CONFIG_PPC_BOOK3E */
134 
135 	mm_context_t context;
136 
137 	/*
138 	 * then miscellaneous read-write fields
139 	 */
140 	struct task_struct *__current;	/* Pointer to current */
141 	u64 kstack;			/* Saved Kernel stack addr */
142 	u64 stab_rr;			/* stab/slb round-robin counter */
143 	u64 saved_r1;			/* r1 save for RTAS calls or PM */
144 	u64 saved_msr;			/* MSR saved here by enter_rtas */
145 	u16 trap_save;			/* Used when bad stack is encountered */
146 	u8 soft_enabled;		/* irq soft-enable flag */
147 	u8 irq_happened;		/* irq happened while soft-disabled */
148 	u8 io_sync;			/* writel() needs spin_unlock sync */
149 	u8 irq_work_pending;		/* IRQ_WORK interrupt while soft-disable */
150 	u8 nap_state_lost;		/* NV GPR values lost in power7_idle */
151 	u64 sprg_vdso;			/* Saved user-visible sprg */
152 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
153 	u64 tm_scratch;                 /* TM scratch area for reclaim */
154 #endif
155 
156 #ifdef CONFIG_PPC_POWERNV
157 	/* Pointer to OPAL machine check event structure set by the
158 	 * early exception handler for use by high level C handler
159 	 */
160 	struct opal_machine_check_event *opal_mc_evt;
161 #endif
162 #ifdef CONFIG_PPC_BOOK3S_64
163 	/* Exclusive emergency stack pointer for machine check exception. */
164 	void *mc_emergency_sp;
165 	/*
166 	 * Flag to check whether we are in machine check early handler
167 	 * and already using emergency stack.
168 	 */
169 	u16 in_mce;
170 	u8 hmi_event_available;		 /* HMI event is available */
171 #endif
172 
173 	/* Stuff for accurate time accounting */
174 	u64 user_time;			/* accumulated usermode TB ticks */
175 	u64 system_time;		/* accumulated system TB ticks */
176 	u64 user_time_scaled;		/* accumulated usermode SPURR ticks */
177 	u64 starttime;			/* TB value snapshot */
178 	u64 starttime_user;		/* TB value on exit to usermode */
179 	u64 startspurr;			/* SPURR value snapshot */
180 	u64 utime_sspurr;		/* ->user_time when ->startspurr set */
181 	u64 stolen_time;		/* TB ticks taken by hypervisor */
182 	u64 dtl_ridx;			/* read index in dispatch log */
183 	struct dtl_entry *dtl_curr;	/* pointer corresponding to dtl_ridx */
184 
185 #ifdef CONFIG_KVM_BOOK3S_HANDLER
186 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
187 	/* We use this to store guest state in */
188 	struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
189 #endif
190 	struct kvmppc_host_state kvm_hstate;
191 #endif
192 };
193 
194 extern struct paca_struct *paca;
195 extern void initialise_paca(struct paca_struct *new_paca, int cpu);
196 extern void setup_paca(struct paca_struct *new_paca);
197 extern void allocate_pacas(void);
198 extern void free_unused_pacas(void);
199 
200 #else /* CONFIG_PPC64 */
201 
202 static inline void allocate_pacas(void) { };
203 static inline void free_unused_pacas(void) { };
204 
205 #endif /* CONFIG_PPC64 */
206 
207 #endif /* __KERNEL__ */
208 #endif /* _ASM_POWERPC_PACA_H */
209