1b8b572e1SStephen Rothwell #ifndef _ASM_POWERPC_OHARE_H 2b8b572e1SStephen Rothwell #define _ASM_POWERPC_OHARE_H 3b8b572e1SStephen Rothwell #ifdef __KERNEL__ 4b8b572e1SStephen Rothwell /* 5b8b572e1SStephen Rothwell * ohare.h: definitions for using the "O'Hare" I/O controller chip. 6b8b572e1SStephen Rothwell * 7b8b572e1SStephen Rothwell * Copyright (C) 1997 Paul Mackerras. 8b8b572e1SStephen Rothwell * 9b8b572e1SStephen Rothwell * BenH: Changed to match those of heathrow (but not all of them). Please 10b8b572e1SStephen Rothwell * check if I didn't break anything (especially the media bay). 11b8b572e1SStephen Rothwell */ 12b8b572e1SStephen Rothwell 13b8b572e1SStephen Rothwell /* offset from ohare base for feature control register */ 14b8b572e1SStephen Rothwell #define OHARE_MBCR 0x34 15b8b572e1SStephen Rothwell #define OHARE_FCR 0x38 16b8b572e1SStephen Rothwell 17b8b572e1SStephen Rothwell /* 18b8b572e1SStephen Rothwell * Bits in feature control register. 19b8b572e1SStephen Rothwell * These were mostly derived by experiment on a powerbook 3400 20b8b572e1SStephen Rothwell * and may differ for other machines. 21b8b572e1SStephen Rothwell */ 22b8b572e1SStephen Rothwell #define OH_SCC_RESET 1 23b8b572e1SStephen Rothwell #define OH_BAY_POWER_N 2 /* a guess */ 24b8b572e1SStephen Rothwell #define OH_BAY_PCI_ENABLE 4 /* a guess */ 25b8b572e1SStephen Rothwell #define OH_BAY_IDE_ENABLE 8 26b8b572e1SStephen Rothwell #define OH_BAY_FLOPPY_ENABLE 0x10 27b8b572e1SStephen Rothwell #define OH_IDE0_ENABLE 0x20 28b8b572e1SStephen Rothwell #define OH_IDE0_RESET_N 0x40 /* a guess */ 29b8b572e1SStephen Rothwell #define OH_BAY_DEV_MASK 0x1c 30b8b572e1SStephen Rothwell #define OH_BAY_RESET_N 0x80 31b8b572e1SStephen Rothwell #define OH_IOBUS_ENABLE 0x100 /* IOBUS seems to be IDE */ 32b8b572e1SStephen Rothwell #define OH_SCC_ENABLE 0x200 33b8b572e1SStephen Rothwell #define OH_MESH_ENABLE 0x400 34b8b572e1SStephen Rothwell #define OH_FLOPPY_ENABLE 0x800 35b8b572e1SStephen Rothwell #define OH_SCCA_IO 0x4000 36b8b572e1SStephen Rothwell #define OH_SCCB_IO 0x8000 37b8b572e1SStephen Rothwell #define OH_VIA_ENABLE 0x10000 /* Is apparently wrong, to be verified */ 38b8b572e1SStephen Rothwell #define OH_IDE1_RESET_N 0x800000 39b8b572e1SStephen Rothwell 40b8b572e1SStephen Rothwell /* 41b8b572e1SStephen Rothwell * Bits to set in the feature control register on PowerBooks. 42b8b572e1SStephen Rothwell */ 43b8b572e1SStephen Rothwell #define PBOOK_FEATURES (OH_IDE_ENABLE | OH_SCC_ENABLE | \ 44b8b572e1SStephen Rothwell OH_MESH_ENABLE | OH_SCCA_IO | OH_SCCB_IO) 45b8b572e1SStephen Rothwell 46b8b572e1SStephen Rothwell /* 47b8b572e1SStephen Rothwell * A magic value to put into the feature control register of the 48b8b572e1SStephen Rothwell * "ohare" I/O controller on Starmaxes to enable the IDE CD interface. 49b8b572e1SStephen Rothwell * Contributed by Harry Eaton. 50b8b572e1SStephen Rothwell */ 51b8b572e1SStephen Rothwell #define STARMAX_FEATURES 0xbeff7a 52b8b572e1SStephen Rothwell 53b8b572e1SStephen Rothwell #endif /* __KERNEL__ */ 54b8b572e1SStephen Rothwell #endif /* _ASM_POWERPC_OHARE_H */ 55