1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_H
3 #define _ASM_POWERPC_NOHASH_64_PGTABLE_H
4 /*
5  * This file contains the functions and defines necessary to modify and use
6  * the ppc64 non-hashed page table.
7  */
8 
9 #include <asm/nohash/64/pgtable-4k.h>
10 #include <asm/barrier.h>
11 #include <asm/asm-const.h>
12 
13 #define FIRST_USER_ADDRESS	0UL
14 
15 /*
16  * Size of EA range mapped by our pagetables.
17  */
18 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
19 			    PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
20 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
21 
22 #define PMD_CACHE_INDEX	PMD_INDEX_SIZE
23 #define PUD_CACHE_INDEX PUD_INDEX_SIZE
24 
25 /*
26  * Define the address range of the kernel non-linear virtual area
27  */
28 #define KERN_VIRT_START ASM_CONST(0x8000000000000000)
29 #define KERN_VIRT_SIZE	ASM_CONST(0x0000100000000000)
30 
31 /*
32  * The vmalloc space starts at the beginning of that region, and
33  * occupies a quarter of it on Book3E
34  * (we keep a quarter for the virtual memmap)
35  */
36 #define VMALLOC_START	KERN_VIRT_START
37 #define VMALLOC_SIZE	(KERN_VIRT_SIZE >> 2)
38 #define VMALLOC_END	(VMALLOC_START + VMALLOC_SIZE)
39 
40 /*
41  * The second half of the kernel virtual space is used for IO mappings,
42  * it's itself carved into the PIO region (ISA and PHB IO space) and
43  * the ioremap space
44  *
45  *  ISA_IO_BASE = KERN_IO_START, 64K reserved area
46  *  PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
47  * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
48  */
49 #define KERN_IO_START	(KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
50 #define FULL_IO_SIZE	0x80000000ul
51 #define  ISA_IO_BASE	(KERN_IO_START)
52 #define  ISA_IO_END	(KERN_IO_START + 0x10000ul)
53 #define  PHB_IO_BASE	(ISA_IO_END)
54 #define  PHB_IO_END	(KERN_IO_START + FULL_IO_SIZE)
55 #define IOREMAP_BASE	(PHB_IO_END)
56 #define IOREMAP_START	(ioremap_bot)
57 #define IOREMAP_END	(KERN_VIRT_START + KERN_VIRT_SIZE)
58 
59 
60 /*
61  * Region IDs
62  */
63 #define REGION_SHIFT		60UL
64 #define REGION_MASK		(0xfUL << REGION_SHIFT)
65 #define REGION_ID(ea)		(((unsigned long)(ea)) >> REGION_SHIFT)
66 
67 #define VMALLOC_REGION_ID	(REGION_ID(VMALLOC_START))
68 #define KERNEL_REGION_ID	(REGION_ID(PAGE_OFFSET))
69 #define USER_REGION_ID		(0UL)
70 
71 /*
72  * Defines the address of the vmemap area, in its own region on
73  * after the vmalloc space on Book3E
74  */
75 #define VMEMMAP_BASE		VMALLOC_END
76 #define VMEMMAP_END		KERN_IO_START
77 #define vmemmap			((struct page *)VMEMMAP_BASE)
78 
79 
80 /*
81  * Include the PTE bits definitions
82  */
83 #include <asm/nohash/pte-book3e.h>
84 
85 #define _PAGE_SAO	0
86 
87 #define PTE_RPN_MASK	(~((1UL << PTE_RPN_SHIFT) - 1))
88 
89 /*
90  * _PAGE_CHG_MASK masks of bits that are to be preserved across
91  * pgprot changes.
92  */
93 #define _PAGE_CHG_MASK	(PTE_RPN_MASK | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SPECIAL)
94 
95 #define H_PAGE_4K_PFN 0
96 
97 #ifndef __ASSEMBLY__
98 /* pte_clear moved to later in this file */
99 
100 static inline pte_t pte_mkwrite(pte_t pte)
101 {
102 	return __pte(pte_val(pte) | _PAGE_RW);
103 }
104 
105 static inline pte_t pte_mkdirty(pte_t pte)
106 {
107 	return __pte(pte_val(pte) | _PAGE_DIRTY);
108 }
109 
110 static inline pte_t pte_mkyoung(pte_t pte)
111 {
112 	return __pte(pte_val(pte) | _PAGE_ACCESSED);
113 }
114 
115 static inline pte_t pte_wrprotect(pte_t pte)
116 {
117 	return __pte(pte_val(pte) & ~_PAGE_RW);
118 }
119 
120 static inline pte_t pte_mkexec(pte_t pte)
121 {
122 	return __pte(pte_val(pte) | _PAGE_EXEC);
123 }
124 
125 #define PMD_BAD_BITS		(PTE_TABLE_SIZE-1)
126 #define PUD_BAD_BITS		(PMD_TABLE_SIZE-1)
127 
128 static inline void pmd_set(pmd_t *pmdp, unsigned long val)
129 {
130 	*pmdp = __pmd(val);
131 }
132 
133 static inline void pmd_clear(pmd_t *pmdp)
134 {
135 	*pmdp = __pmd(0);
136 }
137 
138 static inline pte_t pmd_pte(pmd_t pmd)
139 {
140 	return __pte(pmd_val(pmd));
141 }
142 
143 #define pmd_none(pmd)		(!pmd_val(pmd))
144 #define	pmd_bad(pmd)		(!is_kernel_addr(pmd_val(pmd)) \
145 				 || (pmd_val(pmd) & PMD_BAD_BITS))
146 #define	pmd_present(pmd)	(!pmd_none(pmd))
147 #define pmd_page_vaddr(pmd)	(pmd_val(pmd) & ~PMD_MASKED_BITS)
148 extern struct page *pmd_page(pmd_t pmd);
149 
150 static inline void pud_set(pud_t *pudp, unsigned long val)
151 {
152 	*pudp = __pud(val);
153 }
154 
155 static inline void pud_clear(pud_t *pudp)
156 {
157 	*pudp = __pud(0);
158 }
159 
160 #define pud_none(pud)		(!pud_val(pud))
161 #define	pud_bad(pud)		(!is_kernel_addr(pud_val(pud)) \
162 				 || (pud_val(pud) & PUD_BAD_BITS))
163 #define pud_present(pud)	(pud_val(pud) != 0)
164 #define pud_page_vaddr(pud)	(pud_val(pud) & ~PUD_MASKED_BITS)
165 
166 extern struct page *pud_page(pud_t pud);
167 
168 static inline pte_t pud_pte(pud_t pud)
169 {
170 	return __pte(pud_val(pud));
171 }
172 
173 static inline pud_t pte_pud(pte_t pte)
174 {
175 	return __pud(pte_val(pte));
176 }
177 #define pud_write(pud)		pte_write(pud_pte(pud))
178 #define pgd_write(pgd)		pte_write(pgd_pte(pgd))
179 
180 static inline void pgd_set(pgd_t *pgdp, unsigned long val)
181 {
182 	*pgdp = __pgd(val);
183 }
184 
185 /*
186  * Find an entry in a page-table-directory.  We combine the address region
187  * (the high order N bits) and the pgd portion of the address.
188  */
189 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1))
190 
191 #define pgd_offset(mm, address)	 ((mm)->pgd + pgd_index(address))
192 
193 #define pmd_offset(pudp,addr) \
194   (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
195 
196 #define pte_offset_kernel(dir,addr) \
197   (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
198 
199 #define pte_offset_map(dir,addr)	pte_offset_kernel((dir), (addr))
200 
201 static inline void pte_unmap(pte_t *pte) { }
202 
203 /* to find an entry in a kernel page-table-directory */
204 /* This now only contains the vmalloc pages */
205 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
206 
207 /* Atomic PTE updates */
208 static inline unsigned long pte_update(struct mm_struct *mm,
209 				       unsigned long addr,
210 				       pte_t *ptep, unsigned long clr,
211 				       unsigned long set,
212 				       int huge)
213 {
214 #ifdef PTE_ATOMIC_UPDATES
215 	unsigned long old, tmp;
216 
217 	__asm__ __volatile__(
218 	"1:	ldarx	%0,0,%3		# pte_update\n\
219 	andc	%1,%0,%4 \n\
220 	or	%1,%1,%6\n\
221 	stdcx.	%1,0,%3 \n\
222 	bne-	1b"
223 	: "=&r" (old), "=&r" (tmp), "=m" (*ptep)
224 	: "r" (ptep), "r" (clr), "m" (*ptep), "r" (set)
225 	: "cc" );
226 #else
227 	unsigned long old = pte_val(*ptep);
228 	*ptep = __pte((old & ~clr) | set);
229 #endif
230 	/* huge pages use the old page table lock */
231 	if (!huge)
232 		assert_pte_locked(mm, addr);
233 
234 	return old;
235 }
236 
237 static inline int pte_young(pte_t pte)
238 {
239 	return pte_val(pte) & _PAGE_ACCESSED;
240 }
241 
242 static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
243 					      unsigned long addr, pte_t *ptep)
244 {
245 	unsigned long old;
246 
247 	if (pte_young(*ptep))
248 		return 0;
249 	old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
250 	return (old & _PAGE_ACCESSED) != 0;
251 }
252 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
253 #define ptep_test_and_clear_young(__vma, __addr, __ptep)		   \
254 ({									   \
255 	int __r;							   \
256 	__r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
257 	__r;								   \
258 })
259 
260 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
261 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
262 				      pte_t *ptep)
263 {
264 
265 	if ((pte_val(*ptep) & _PAGE_RW) == 0)
266 		return;
267 
268 	pte_update(mm, addr, ptep, _PAGE_RW, 0, 0);
269 }
270 
271 #define __HAVE_ARCH_HUGE_PTEP_SET_WRPROTECT
272 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
273 					   unsigned long addr, pte_t *ptep)
274 {
275 	if ((pte_val(*ptep) & _PAGE_RW) == 0)
276 		return;
277 
278 	pte_update(mm, addr, ptep, _PAGE_RW, 0, 1);
279 }
280 
281 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
282 #define ptep_clear_flush_young(__vma, __address, __ptep)		\
283 ({									\
284 	int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
285 						  __ptep);		\
286 	__young;							\
287 })
288 
289 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
290 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
291 				       unsigned long addr, pte_t *ptep)
292 {
293 	unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
294 	return __pte(old);
295 }
296 
297 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
298 			     pte_t * ptep)
299 {
300 	pte_update(mm, addr, ptep, ~0UL, 0, 0);
301 }
302 
303 
304 /* Set the dirty and/or accessed bits atomically in a linux PTE */
305 static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
306 					   pte_t *ptep, pte_t entry,
307 					   unsigned long address,
308 					   int psize)
309 {
310 	unsigned long bits = pte_val(entry) &
311 		(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
312 
313 #ifdef PTE_ATOMIC_UPDATES
314 	unsigned long old, tmp;
315 
316 	__asm__ __volatile__(
317 	"1:	ldarx	%0,0,%4\n\
318 		or	%0,%3,%0\n\
319 		stdcx.	%0,0,%4\n\
320 		bne-	1b"
321 	:"=&r" (old), "=&r" (tmp), "=m" (*ptep)
322 	:"r" (bits), "r" (ptep), "m" (*ptep)
323 	:"cc");
324 #else
325 	unsigned long old = pte_val(*ptep);
326 	*ptep = __pte(old | bits);
327 #endif
328 
329 	flush_tlb_page(vma, address);
330 }
331 
332 #define __HAVE_ARCH_PTE_SAME
333 #define pte_same(A,B)	((pte_val(A) ^ pte_val(B)) == 0)
334 
335 #define pte_ERROR(e) \
336 	pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
337 #define pmd_ERROR(e) \
338 	pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
339 #define pgd_ERROR(e) \
340 	pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
341 
342 /* Encode and de-code a swap entry */
343 #define MAX_SWAPFILES_CHECK() do { \
344 	BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
345 	} while (0)
346 
347 #define SWP_TYPE_BITS 5
348 #define __swp_type(x)		(((x).val >> _PAGE_BIT_SWAP_TYPE) \
349 				& ((1UL << SWP_TYPE_BITS) - 1))
350 #define __swp_offset(x)		((x).val >> PTE_RPN_SHIFT)
351 #define __swp_entry(type, offset)	((swp_entry_t) { \
352 					((type) << _PAGE_BIT_SWAP_TYPE) \
353 					| ((offset) << PTE_RPN_SHIFT) })
354 
355 #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val((pte)) })
356 #define __swp_entry_to_pte(x)		__pte((x).val)
357 
358 int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot);
359 extern int __meminit vmemmap_create_mapping(unsigned long start,
360 					    unsigned long page_size,
361 					    unsigned long phys);
362 extern void vmemmap_remove_mapping(unsigned long start,
363 				   unsigned long page_size);
364 #endif /* __ASSEMBLY__ */
365 
366 #endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */
367