1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_H
3 #define _ASM_POWERPC_NOHASH_64_PGTABLE_H
4 /*
5  * This file contains the functions and defines necessary to modify and use
6  * the ppc64 non-hashed page table.
7  */
8 
9 #include <asm/nohash/64/pgtable-4k.h>
10 #include <asm/barrier.h>
11 #include <asm/asm-const.h>
12 
13 #define FIRST_USER_ADDRESS	0UL
14 
15 /*
16  * Size of EA range mapped by our pagetables.
17  */
18 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
19 			    PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
20 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
21 
22 #define PMD_CACHE_INDEX	PMD_INDEX_SIZE
23 #define PUD_CACHE_INDEX PUD_INDEX_SIZE
24 
25 /*
26  * Define the address range of the kernel non-linear virtual area
27  */
28 #define KERN_VIRT_START ASM_CONST(0x8000000000000000)
29 #define KERN_VIRT_SIZE	ASM_CONST(0x0000100000000000)
30 
31 /*
32  * The vmalloc space starts at the beginning of that region, and
33  * occupies a quarter of it on Book3E
34  * (we keep a quarter for the virtual memmap)
35  */
36 #define VMALLOC_START	KERN_VIRT_START
37 #define VMALLOC_SIZE	(KERN_VIRT_SIZE >> 2)
38 #define VMALLOC_END	(VMALLOC_START + VMALLOC_SIZE)
39 
40 /*
41  * The second half of the kernel virtual space is used for IO mappings,
42  * it's itself carved into the PIO region (ISA and PHB IO space) and
43  * the ioremap space
44  *
45  *  ISA_IO_BASE = KERN_IO_START, 64K reserved area
46  *  PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
47  * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
48  */
49 #define KERN_IO_START	(KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
50 #define FULL_IO_SIZE	0x80000000ul
51 #define  ISA_IO_BASE	(KERN_IO_START)
52 #define  ISA_IO_END	(KERN_IO_START + 0x10000ul)
53 #define  PHB_IO_BASE	(ISA_IO_END)
54 #define  PHB_IO_END	(KERN_IO_START + FULL_IO_SIZE)
55 #define IOREMAP_BASE	(PHB_IO_END)
56 #define IOREMAP_END	(KERN_VIRT_START + KERN_VIRT_SIZE)
57 
58 
59 /*
60  * Region IDs
61  */
62 #define REGION_SHIFT		60UL
63 #define REGION_MASK		(0xfUL << REGION_SHIFT)
64 #define REGION_ID(ea)		(((unsigned long)(ea)) >> REGION_SHIFT)
65 
66 #define VMALLOC_REGION_ID	(REGION_ID(VMALLOC_START))
67 #define KERNEL_REGION_ID	(REGION_ID(PAGE_OFFSET))
68 #define USER_REGION_ID		(0UL)
69 
70 /*
71  * Defines the address of the vmemap area, in its own region on
72  * after the vmalloc space on Book3E
73  */
74 #define VMEMMAP_BASE		VMALLOC_END
75 #define VMEMMAP_END		KERN_IO_START
76 #define vmemmap			((struct page *)VMEMMAP_BASE)
77 
78 
79 /*
80  * Include the PTE bits definitions
81  */
82 #include <asm/nohash/pte-book3e.h>
83 
84 #define _PAGE_SAO	0
85 
86 #define PTE_RPN_MASK	(~((1UL << PTE_RPN_SHIFT) - 1))
87 
88 /*
89  * _PAGE_CHG_MASK masks of bits that are to be preserved across
90  * pgprot changes.
91  */
92 #define _PAGE_CHG_MASK	(PTE_RPN_MASK | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SPECIAL)
93 
94 #define H_PAGE_4K_PFN 0
95 
96 #ifndef __ASSEMBLY__
97 /* pte_clear moved to later in this file */
98 
99 static inline pte_t pte_mkwrite(pte_t pte)
100 {
101 	return __pte(pte_val(pte) | _PAGE_RW);
102 }
103 
104 static inline pte_t pte_mkdirty(pte_t pte)
105 {
106 	return __pte(pte_val(pte) | _PAGE_DIRTY);
107 }
108 
109 static inline pte_t pte_mkyoung(pte_t pte)
110 {
111 	return __pte(pte_val(pte) | _PAGE_ACCESSED);
112 }
113 
114 static inline pte_t pte_wrprotect(pte_t pte)
115 {
116 	return __pte(pte_val(pte) & ~_PAGE_RW);
117 }
118 
119 static inline pte_t pte_mkexec(pte_t pte)
120 {
121 	return __pte(pte_val(pte) | _PAGE_EXEC);
122 }
123 
124 #define PMD_BAD_BITS		(PTE_TABLE_SIZE-1)
125 #define PUD_BAD_BITS		(PMD_TABLE_SIZE-1)
126 
127 static inline void pmd_set(pmd_t *pmdp, unsigned long val)
128 {
129 	*pmdp = __pmd(val);
130 }
131 
132 static inline void pmd_clear(pmd_t *pmdp)
133 {
134 	*pmdp = __pmd(0);
135 }
136 
137 static inline pte_t pmd_pte(pmd_t pmd)
138 {
139 	return __pte(pmd_val(pmd));
140 }
141 
142 #define pmd_none(pmd)		(!pmd_val(pmd))
143 #define	pmd_bad(pmd)		(!is_kernel_addr(pmd_val(pmd)) \
144 				 || (pmd_val(pmd) & PMD_BAD_BITS))
145 #define	pmd_present(pmd)	(!pmd_none(pmd))
146 #define pmd_page_vaddr(pmd)	(pmd_val(pmd) & ~PMD_MASKED_BITS)
147 extern struct page *pmd_page(pmd_t pmd);
148 
149 static inline void pud_set(pud_t *pudp, unsigned long val)
150 {
151 	*pudp = __pud(val);
152 }
153 
154 static inline void pud_clear(pud_t *pudp)
155 {
156 	*pudp = __pud(0);
157 }
158 
159 #define pud_none(pud)		(!pud_val(pud))
160 #define	pud_bad(pud)		(!is_kernel_addr(pud_val(pud)) \
161 				 || (pud_val(pud) & PUD_BAD_BITS))
162 #define pud_present(pud)	(pud_val(pud) != 0)
163 #define pud_page_vaddr(pud)	(pud_val(pud) & ~PUD_MASKED_BITS)
164 
165 extern struct page *pud_page(pud_t pud);
166 
167 static inline pte_t pud_pte(pud_t pud)
168 {
169 	return __pte(pud_val(pud));
170 }
171 
172 static inline pud_t pte_pud(pte_t pte)
173 {
174 	return __pud(pte_val(pte));
175 }
176 #define pud_write(pud)		pte_write(pud_pte(pud))
177 #define pgd_write(pgd)		pte_write(pgd_pte(pgd))
178 
179 static inline void pgd_set(pgd_t *pgdp, unsigned long val)
180 {
181 	*pgdp = __pgd(val);
182 }
183 
184 /*
185  * Find an entry in a page-table-directory.  We combine the address region
186  * (the high order N bits) and the pgd portion of the address.
187  */
188 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1))
189 
190 #define pgd_offset(mm, address)	 ((mm)->pgd + pgd_index(address))
191 
192 #define pmd_offset(pudp,addr) \
193   (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
194 
195 #define pte_offset_kernel(dir,addr) \
196   (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
197 
198 #define pte_offset_map(dir,addr)	pte_offset_kernel((dir), (addr))
199 
200 static inline void pte_unmap(pte_t *pte) { }
201 
202 /* to find an entry in a kernel page-table-directory */
203 /* This now only contains the vmalloc pages */
204 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
205 
206 /* Atomic PTE updates */
207 static inline unsigned long pte_update(struct mm_struct *mm,
208 				       unsigned long addr,
209 				       pte_t *ptep, unsigned long clr,
210 				       unsigned long set,
211 				       int huge)
212 {
213 #ifdef PTE_ATOMIC_UPDATES
214 	unsigned long old, tmp;
215 
216 	__asm__ __volatile__(
217 	"1:	ldarx	%0,0,%3		# pte_update\n\
218 	andc	%1,%0,%4 \n\
219 	or	%1,%1,%6\n\
220 	stdcx.	%1,0,%3 \n\
221 	bne-	1b"
222 	: "=&r" (old), "=&r" (tmp), "=m" (*ptep)
223 	: "r" (ptep), "r" (clr), "m" (*ptep), "r" (set)
224 	: "cc" );
225 #else
226 	unsigned long old = pte_val(*ptep);
227 	*ptep = __pte((old & ~clr) | set);
228 #endif
229 	/* huge pages use the old page table lock */
230 	if (!huge)
231 		assert_pte_locked(mm, addr);
232 
233 	return old;
234 }
235 
236 static inline int pte_young(pte_t pte)
237 {
238 	return pte_val(pte) & _PAGE_ACCESSED;
239 }
240 
241 static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
242 					      unsigned long addr, pte_t *ptep)
243 {
244 	unsigned long old;
245 
246 	if (pte_young(*ptep))
247 		return 0;
248 	old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
249 	return (old & _PAGE_ACCESSED) != 0;
250 }
251 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
252 #define ptep_test_and_clear_young(__vma, __addr, __ptep)		   \
253 ({									   \
254 	int __r;							   \
255 	__r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
256 	__r;								   \
257 })
258 
259 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
260 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
261 				      pte_t *ptep)
262 {
263 
264 	if ((pte_val(*ptep) & _PAGE_RW) == 0)
265 		return;
266 
267 	pte_update(mm, addr, ptep, _PAGE_RW, 0, 0);
268 }
269 
270 #define __HAVE_ARCH_HUGE_PTEP_SET_WRPROTECT
271 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
272 					   unsigned long addr, pte_t *ptep)
273 {
274 	if ((pte_val(*ptep) & _PAGE_RW) == 0)
275 		return;
276 
277 	pte_update(mm, addr, ptep, _PAGE_RW, 0, 1);
278 }
279 
280 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
281 #define ptep_clear_flush_young(__vma, __address, __ptep)		\
282 ({									\
283 	int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
284 						  __ptep);		\
285 	__young;							\
286 })
287 
288 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
289 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
290 				       unsigned long addr, pte_t *ptep)
291 {
292 	unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
293 	return __pte(old);
294 }
295 
296 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
297 			     pte_t * ptep)
298 {
299 	pte_update(mm, addr, ptep, ~0UL, 0, 0);
300 }
301 
302 
303 /* Set the dirty and/or accessed bits atomically in a linux PTE */
304 static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
305 					   pte_t *ptep, pte_t entry,
306 					   unsigned long address,
307 					   int psize)
308 {
309 	unsigned long bits = pte_val(entry) &
310 		(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
311 
312 #ifdef PTE_ATOMIC_UPDATES
313 	unsigned long old, tmp;
314 
315 	__asm__ __volatile__(
316 	"1:	ldarx	%0,0,%4\n\
317 		or	%0,%3,%0\n\
318 		stdcx.	%0,0,%4\n\
319 		bne-	1b"
320 	:"=&r" (old), "=&r" (tmp), "=m" (*ptep)
321 	:"r" (bits), "r" (ptep), "m" (*ptep)
322 	:"cc");
323 #else
324 	unsigned long old = pte_val(*ptep);
325 	*ptep = __pte(old | bits);
326 #endif
327 
328 	flush_tlb_page(vma, address);
329 }
330 
331 #define __HAVE_ARCH_PTE_SAME
332 #define pte_same(A,B)	((pte_val(A) ^ pte_val(B)) == 0)
333 
334 #define pte_ERROR(e) \
335 	pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
336 #define pmd_ERROR(e) \
337 	pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
338 #define pgd_ERROR(e) \
339 	pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
340 
341 /* Encode and de-code a swap entry */
342 #define MAX_SWAPFILES_CHECK() do { \
343 	BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
344 	} while (0)
345 
346 #define SWP_TYPE_BITS 5
347 #define __swp_type(x)		(((x).val >> _PAGE_BIT_SWAP_TYPE) \
348 				& ((1UL << SWP_TYPE_BITS) - 1))
349 #define __swp_offset(x)		((x).val >> PTE_RPN_SHIFT)
350 #define __swp_entry(type, offset)	((swp_entry_t) { \
351 					((type) << _PAGE_BIT_SWAP_TYPE) \
352 					| ((offset) << PTE_RPN_SHIFT) })
353 
354 #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val((pte)) })
355 #define __swp_entry_to_pte(x)		__pte((x).val)
356 
357 int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot);
358 extern int __meminit vmemmap_create_mapping(unsigned long start,
359 					    unsigned long page_size,
360 					    unsigned long phys);
361 extern void vmemmap_remove_mapping(unsigned long start,
362 				   unsigned long page_size);
363 #endif /* __ASSEMBLY__ */
364 
365 #endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */
366