1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_H
3 #define _ASM_POWERPC_NOHASH_64_PGTABLE_H
4 /*
5  * This file contains the functions and defines necessary to modify and use
6  * the ppc64 hashed page table.
7  */
8 
9 #include <asm/nohash/64/pgtable-4k.h>
10 #include <asm/barrier.h>
11 
12 #ifdef CONFIG_PPC_64K_PAGES
13 #error "Page size not supported"
14 #endif
15 
16 #define FIRST_USER_ADDRESS	0UL
17 
18 /*
19  * Size of EA range mapped by our pagetables.
20  */
21 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
22 			    PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
23 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
24 
25 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
26 #define PMD_CACHE_INDEX	(PMD_INDEX_SIZE + 1)
27 #else
28 #define PMD_CACHE_INDEX	PMD_INDEX_SIZE
29 #endif
30 #define PUD_CACHE_INDEX PUD_INDEX_SIZE
31 
32 /*
33  * Define the address range of the kernel non-linear virtual area
34  */
35 #define KERN_VIRT_START ASM_CONST(0x8000000000000000)
36 #define KERN_VIRT_SIZE	ASM_CONST(0x0000100000000000)
37 
38 /*
39  * The vmalloc space starts at the beginning of that region, and
40  * occupies half of it on hash CPUs and a quarter of it on Book3E
41  * (we keep a quarter for the virtual memmap)
42  */
43 #define VMALLOC_START	KERN_VIRT_START
44 #define VMALLOC_SIZE	(KERN_VIRT_SIZE >> 2)
45 #define VMALLOC_END	(VMALLOC_START + VMALLOC_SIZE)
46 
47 /*
48  * The second half of the kernel virtual space is used for IO mappings,
49  * it's itself carved into the PIO region (ISA and PHB IO space) and
50  * the ioremap space
51  *
52  *  ISA_IO_BASE = KERN_IO_START, 64K reserved area
53  *  PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
54  * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
55  */
56 #define KERN_IO_START	(KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
57 #define FULL_IO_SIZE	0x80000000ul
58 #define  ISA_IO_BASE	(KERN_IO_START)
59 #define  ISA_IO_END	(KERN_IO_START + 0x10000ul)
60 #define  PHB_IO_BASE	(ISA_IO_END)
61 #define  PHB_IO_END	(KERN_IO_START + FULL_IO_SIZE)
62 #define IOREMAP_BASE	(PHB_IO_END)
63 #define IOREMAP_END	(KERN_VIRT_START + KERN_VIRT_SIZE)
64 
65 
66 /*
67  * Region IDs
68  */
69 #define REGION_SHIFT		60UL
70 #define REGION_MASK		(0xfUL << REGION_SHIFT)
71 #define REGION_ID(ea)		(((unsigned long)(ea)) >> REGION_SHIFT)
72 
73 #define VMALLOC_REGION_ID	(REGION_ID(VMALLOC_START))
74 #define KERNEL_REGION_ID	(REGION_ID(PAGE_OFFSET))
75 #define VMEMMAP_REGION_ID	(0xfUL)	/* Server only */
76 #define USER_REGION_ID		(0UL)
77 
78 /*
79  * Defines the address of the vmemap area, in its own region on
80  * hash table CPUs and after the vmalloc space on Book3E
81  */
82 #define VMEMMAP_BASE		VMALLOC_END
83 #define VMEMMAP_END		KERN_IO_START
84 #define vmemmap			((struct page *)VMEMMAP_BASE)
85 
86 
87 /*
88  * Include the PTE bits definitions
89  */
90 #include <asm/nohash/pte-book3e.h>
91 #include <asm/pte-common.h>
92 
93 #ifndef __ASSEMBLY__
94 /* pte_clear moved to later in this file */
95 
96 #define PMD_BAD_BITS		(PTE_TABLE_SIZE-1)
97 #define PUD_BAD_BITS		(PMD_TABLE_SIZE-1)
98 
99 static inline void pmd_set(pmd_t *pmdp, unsigned long val)
100 {
101 	*pmdp = __pmd(val);
102 }
103 
104 static inline void pmd_clear(pmd_t *pmdp)
105 {
106 	*pmdp = __pmd(0);
107 }
108 
109 static inline pte_t pmd_pte(pmd_t pmd)
110 {
111 	return __pte(pmd_val(pmd));
112 }
113 
114 #define pmd_none(pmd)		(!pmd_val(pmd))
115 #define	pmd_bad(pmd)		(!is_kernel_addr(pmd_val(pmd)) \
116 				 || (pmd_val(pmd) & PMD_BAD_BITS))
117 #define	pmd_present(pmd)	(!pmd_none(pmd))
118 #define pmd_page_vaddr(pmd)	(pmd_val(pmd) & ~PMD_MASKED_BITS)
119 extern struct page *pmd_page(pmd_t pmd);
120 
121 static inline void pud_set(pud_t *pudp, unsigned long val)
122 {
123 	*pudp = __pud(val);
124 }
125 
126 static inline void pud_clear(pud_t *pudp)
127 {
128 	*pudp = __pud(0);
129 }
130 
131 #define pud_none(pud)		(!pud_val(pud))
132 #define	pud_bad(pud)		(!is_kernel_addr(pud_val(pud)) \
133 				 || (pud_val(pud) & PUD_BAD_BITS))
134 #define pud_present(pud)	(pud_val(pud) != 0)
135 #define pud_page_vaddr(pud)	(pud_val(pud) & ~PUD_MASKED_BITS)
136 
137 extern struct page *pud_page(pud_t pud);
138 
139 static inline pte_t pud_pte(pud_t pud)
140 {
141 	return __pte(pud_val(pud));
142 }
143 
144 static inline pud_t pte_pud(pte_t pte)
145 {
146 	return __pud(pte_val(pte));
147 }
148 #define pud_write(pud)		pte_write(pud_pte(pud))
149 #define pgd_write(pgd)		pte_write(pgd_pte(pgd))
150 
151 static inline void pgd_set(pgd_t *pgdp, unsigned long val)
152 {
153 	*pgdp = __pgd(val);
154 }
155 
156 /*
157  * Find an entry in a page-table-directory.  We combine the address region
158  * (the high order N bits) and the pgd portion of the address.
159  */
160 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1))
161 
162 #define pgd_offset(mm, address)	 ((mm)->pgd + pgd_index(address))
163 
164 #define pmd_offset(pudp,addr) \
165   (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
166 
167 #define pte_offset_kernel(dir,addr) \
168   (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
169 
170 #define pte_offset_map(dir,addr)	pte_offset_kernel((dir), (addr))
171 #define pte_unmap(pte)			do { } while(0)
172 
173 /* to find an entry in a kernel page-table-directory */
174 /* This now only contains the vmalloc pages */
175 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
176 
177 /* Atomic PTE updates */
178 static inline unsigned long pte_update(struct mm_struct *mm,
179 				       unsigned long addr,
180 				       pte_t *ptep, unsigned long clr,
181 				       unsigned long set,
182 				       int huge)
183 {
184 #ifdef PTE_ATOMIC_UPDATES
185 	unsigned long old, tmp;
186 
187 	__asm__ __volatile__(
188 	"1:	ldarx	%0,0,%3		# pte_update\n\
189 	andc	%1,%0,%4 \n\
190 	or	%1,%1,%6\n\
191 	stdcx.	%1,0,%3 \n\
192 	bne-	1b"
193 	: "=&r" (old), "=&r" (tmp), "=m" (*ptep)
194 	: "r" (ptep), "r" (clr), "m" (*ptep), "r" (set)
195 	: "cc" );
196 #else
197 	unsigned long old = pte_val(*ptep);
198 	*ptep = __pte((old & ~clr) | set);
199 #endif
200 	/* huge pages use the old page table lock */
201 	if (!huge)
202 		assert_pte_locked(mm, addr);
203 
204 	return old;
205 }
206 
207 static inline int pte_young(pte_t pte)
208 {
209 	return pte_val(pte) & _PAGE_ACCESSED;
210 }
211 
212 static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
213 					      unsigned long addr, pte_t *ptep)
214 {
215 	unsigned long old;
216 
217 	if (pte_young(*ptep))
218 		return 0;
219 	old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
220 	return (old & _PAGE_ACCESSED) != 0;
221 }
222 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
223 #define ptep_test_and_clear_young(__vma, __addr, __ptep)		   \
224 ({									   \
225 	int __r;							   \
226 	__r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
227 	__r;								   \
228 })
229 
230 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
231 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
232 				      pte_t *ptep)
233 {
234 
235 	if ((pte_val(*ptep) & _PAGE_RW) == 0)
236 		return;
237 
238 	pte_update(mm, addr, ptep, _PAGE_RW, 0, 0);
239 }
240 
241 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
242 					   unsigned long addr, pte_t *ptep)
243 {
244 	if ((pte_val(*ptep) & _PAGE_RW) == 0)
245 		return;
246 
247 	pte_update(mm, addr, ptep, _PAGE_RW, 0, 1);
248 }
249 
250 /*
251  * We currently remove entries from the hashtable regardless of whether
252  * the entry was young or dirty. The generic routines only flush if the
253  * entry was young or dirty which is not good enough.
254  *
255  * We should be more intelligent about this but for the moment we override
256  * these functions and force a tlb flush unconditionally
257  */
258 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
259 #define ptep_clear_flush_young(__vma, __address, __ptep)		\
260 ({									\
261 	int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
262 						  __ptep);		\
263 	__young;							\
264 })
265 
266 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
267 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
268 				       unsigned long addr, pte_t *ptep)
269 {
270 	unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
271 	return __pte(old);
272 }
273 
274 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
275 			     pte_t * ptep)
276 {
277 	pte_update(mm, addr, ptep, ~0UL, 0, 0);
278 }
279 
280 
281 /* Set the dirty and/or accessed bits atomically in a linux PTE, this
282  * function doesn't need to flush the hash entry
283  */
284 static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
285 					   pte_t *ptep, pte_t entry,
286 					   unsigned long address,
287 					   int psize)
288 {
289 	unsigned long bits = pte_val(entry) &
290 		(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
291 
292 #ifdef PTE_ATOMIC_UPDATES
293 	unsigned long old, tmp;
294 
295 	__asm__ __volatile__(
296 	"1:	ldarx	%0,0,%4\n\
297 		or	%0,%3,%0\n\
298 		stdcx.	%0,0,%4\n\
299 		bne-	1b"
300 	:"=&r" (old), "=&r" (tmp), "=m" (*ptep)
301 	:"r" (bits), "r" (ptep), "m" (*ptep)
302 	:"cc");
303 #else
304 	unsigned long old = pte_val(*ptep);
305 	*ptep = __pte(old | bits);
306 #endif
307 
308 	flush_tlb_page(vma, address);
309 }
310 
311 #define __HAVE_ARCH_PTE_SAME
312 #define pte_same(A,B)	((pte_val(A) ^ pte_val(B)) == 0)
313 
314 #define pte_ERROR(e) \
315 	pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
316 #define pmd_ERROR(e) \
317 	pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
318 #define pgd_ERROR(e) \
319 	pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
320 
321 /* Encode and de-code a swap entry */
322 #define MAX_SWAPFILES_CHECK() do { \
323 	BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
324 	} while (0)
325 /*
326  * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT;
327  */
328 #define SWP_TYPE_BITS 5
329 #define __swp_type(x)		(((x).val >> _PAGE_BIT_SWAP_TYPE) \
330 				& ((1UL << SWP_TYPE_BITS) - 1))
331 #define __swp_offset(x)		((x).val >> PTE_RPN_SHIFT)
332 #define __swp_entry(type, offset)	((swp_entry_t) { \
333 					((type) << _PAGE_BIT_SWAP_TYPE) \
334 					| ((offset) << PTE_RPN_SHIFT) })
335 
336 #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val((pte)) })
337 #define __swp_entry_to_pte(x)		__pte((x).val)
338 
339 extern int map_kernel_page(unsigned long ea, unsigned long pa,
340 			   unsigned long flags);
341 extern int __meminit vmemmap_create_mapping(unsigned long start,
342 					    unsigned long page_size,
343 					    unsigned long phys);
344 extern void vmemmap_remove_mapping(unsigned long start,
345 				   unsigned long page_size);
346 #endif /* __ASSEMBLY__ */
347 
348 #endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */
349