1 #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_H 2 #define _ASM_POWERPC_NOHASH_64_PGTABLE_H 3 /* 4 * This file contains the functions and defines necessary to modify and use 5 * the ppc64 hashed page table. 6 */ 7 8 #ifdef CONFIG_PPC_64K_PAGES 9 #include <asm/nohash/64/pgtable-64k.h> 10 #else 11 #include <asm/nohash/64/pgtable-4k.h> 12 #endif 13 #include <asm/barrier.h> 14 15 #define FIRST_USER_ADDRESS 0UL 16 17 /* 18 * Size of EA range mapped by our pagetables. 19 */ 20 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \ 21 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT) 22 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE) 23 24 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 25 #define PMD_CACHE_INDEX (PMD_INDEX_SIZE + 1) 26 #else 27 #define PMD_CACHE_INDEX PMD_INDEX_SIZE 28 #endif 29 30 /* 31 * Define the address range of the kernel non-linear virtual area 32 */ 33 #define KERN_VIRT_START ASM_CONST(0x8000000000000000) 34 #define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000) 35 36 /* 37 * The vmalloc space starts at the beginning of that region, and 38 * occupies half of it on hash CPUs and a quarter of it on Book3E 39 * (we keep a quarter for the virtual memmap) 40 */ 41 #define VMALLOC_START KERN_VIRT_START 42 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 2) 43 #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE) 44 45 /* 46 * The second half of the kernel virtual space is used for IO mappings, 47 * it's itself carved into the PIO region (ISA and PHB IO space) and 48 * the ioremap space 49 * 50 * ISA_IO_BASE = KERN_IO_START, 64K reserved area 51 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces 52 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE 53 */ 54 #define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1)) 55 #define FULL_IO_SIZE 0x80000000ul 56 #define ISA_IO_BASE (KERN_IO_START) 57 #define ISA_IO_END (KERN_IO_START + 0x10000ul) 58 #define PHB_IO_BASE (ISA_IO_END) 59 #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE) 60 #define IOREMAP_BASE (PHB_IO_END) 61 #define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE) 62 63 64 /* 65 * Region IDs 66 */ 67 #define REGION_SHIFT 60UL 68 #define REGION_MASK (0xfUL << REGION_SHIFT) 69 #define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT) 70 71 #define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START)) 72 #define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET)) 73 #define VMEMMAP_REGION_ID (0xfUL) /* Server only */ 74 #define USER_REGION_ID (0UL) 75 76 /* 77 * Defines the address of the vmemap area, in its own region on 78 * hash table CPUs and after the vmalloc space on Book3E 79 */ 80 #define VMEMMAP_BASE VMALLOC_END 81 #define VMEMMAP_END KERN_IO_START 82 #define vmemmap ((struct page *)VMEMMAP_BASE) 83 84 85 /* 86 * Include the PTE bits definitions 87 */ 88 #include <asm/nohash/pte-book3e.h> 89 #include <asm/pte-common.h> 90 91 #ifndef __ASSEMBLY__ 92 /* pte_clear moved to later in this file */ 93 94 #define PMD_BAD_BITS (PTE_TABLE_SIZE-1) 95 #define PUD_BAD_BITS (PMD_TABLE_SIZE-1) 96 97 static inline void pmd_set(pmd_t *pmdp, unsigned long val) 98 { 99 *pmdp = __pmd(val); 100 } 101 102 static inline void pmd_clear(pmd_t *pmdp) 103 { 104 *pmdp = __pmd(0); 105 } 106 107 static inline pte_t pmd_pte(pmd_t pmd) 108 { 109 return __pte(pmd_val(pmd)); 110 } 111 112 #define pmd_none(pmd) (!pmd_val(pmd)) 113 #define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \ 114 || (pmd_val(pmd) & PMD_BAD_BITS)) 115 #define pmd_present(pmd) (!pmd_none(pmd)) 116 #define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS) 117 extern struct page *pmd_page(pmd_t pmd); 118 119 static inline void pud_set(pud_t *pudp, unsigned long val) 120 { 121 *pudp = __pud(val); 122 } 123 124 static inline void pud_clear(pud_t *pudp) 125 { 126 *pudp = __pud(0); 127 } 128 129 #define pud_none(pud) (!pud_val(pud)) 130 #define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \ 131 || (pud_val(pud) & PUD_BAD_BITS)) 132 #define pud_present(pud) (pud_val(pud) != 0) 133 #define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS) 134 135 extern struct page *pud_page(pud_t pud); 136 137 static inline pte_t pud_pte(pud_t pud) 138 { 139 return __pte(pud_val(pud)); 140 } 141 142 static inline pud_t pte_pud(pte_t pte) 143 { 144 return __pud(pte_val(pte)); 145 } 146 #define pud_write(pud) pte_write(pud_pte(pud)) 147 #define pgd_write(pgd) pte_write(pgd_pte(pgd)) 148 149 static inline void pgd_set(pgd_t *pgdp, unsigned long val) 150 { 151 *pgdp = __pgd(val); 152 } 153 154 /* 155 * Find an entry in a page-table-directory. We combine the address region 156 * (the high order N bits) and the pgd portion of the address. 157 */ 158 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1)) 159 160 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) 161 162 #define pmd_offset(pudp,addr) \ 163 (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))) 164 165 #define pte_offset_kernel(dir,addr) \ 166 (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) 167 168 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr)) 169 #define pte_unmap(pte) do { } while(0) 170 171 /* to find an entry in a kernel page-table-directory */ 172 /* This now only contains the vmalloc pages */ 173 #define pgd_offset_k(address) pgd_offset(&init_mm, address) 174 extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr, 175 pte_t *ptep, unsigned long pte, int huge); 176 177 /* Atomic PTE updates */ 178 static inline unsigned long pte_update(struct mm_struct *mm, 179 unsigned long addr, 180 pte_t *ptep, unsigned long clr, 181 unsigned long set, 182 int huge) 183 { 184 #ifdef PTE_ATOMIC_UPDATES 185 unsigned long old, tmp; 186 187 __asm__ __volatile__( 188 "1: ldarx %0,0,%3 # pte_update\n\ 189 andi. %1,%0,%6\n\ 190 bne- 1b \n\ 191 andc %1,%0,%4 \n\ 192 or %1,%1,%7\n\ 193 stdcx. %1,0,%3 \n\ 194 bne- 1b" 195 : "=&r" (old), "=&r" (tmp), "=m" (*ptep) 196 : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY), "r" (set) 197 : "cc" ); 198 #else 199 unsigned long old = pte_val(*ptep); 200 *ptep = __pte((old & ~clr) | set); 201 #endif 202 /* huge pages use the old page table lock */ 203 if (!huge) 204 assert_pte_locked(mm, addr); 205 206 #ifdef CONFIG_PPC_STD_MMU_64 207 if (old & _PAGE_HASHPTE) 208 hpte_need_flush(mm, addr, ptep, old, huge); 209 #endif 210 211 return old; 212 } 213 214 static inline int __ptep_test_and_clear_young(struct mm_struct *mm, 215 unsigned long addr, pte_t *ptep) 216 { 217 unsigned long old; 218 219 if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0) 220 return 0; 221 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0); 222 return (old & _PAGE_ACCESSED) != 0; 223 } 224 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 225 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \ 226 ({ \ 227 int __r; \ 228 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \ 229 __r; \ 230 }) 231 232 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 233 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, 234 pte_t *ptep) 235 { 236 237 if ((pte_val(*ptep) & _PAGE_RW) == 0) 238 return; 239 240 pte_update(mm, addr, ptep, _PAGE_RW, 0, 0); 241 } 242 243 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, 244 unsigned long addr, pte_t *ptep) 245 { 246 if ((pte_val(*ptep) & _PAGE_RW) == 0) 247 return; 248 249 pte_update(mm, addr, ptep, _PAGE_RW, 0, 1); 250 } 251 252 /* 253 * We currently remove entries from the hashtable regardless of whether 254 * the entry was young or dirty. The generic routines only flush if the 255 * entry was young or dirty which is not good enough. 256 * 257 * We should be more intelligent about this but for the moment we override 258 * these functions and force a tlb flush unconditionally 259 */ 260 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 261 #define ptep_clear_flush_young(__vma, __address, __ptep) \ 262 ({ \ 263 int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \ 264 __ptep); \ 265 __young; \ 266 }) 267 268 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 269 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 270 unsigned long addr, pte_t *ptep) 271 { 272 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0); 273 return __pte(old); 274 } 275 276 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, 277 pte_t * ptep) 278 { 279 pte_update(mm, addr, ptep, ~0UL, 0, 0); 280 } 281 282 283 /* Set the dirty and/or accessed bits atomically in a linux PTE, this 284 * function doesn't need to flush the hash entry 285 */ 286 static inline void __ptep_set_access_flags(struct mm_struct *mm, 287 pte_t *ptep, pte_t entry, 288 unsigned long address) 289 { 290 unsigned long bits = pte_val(entry) & 291 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC); 292 293 #ifdef PTE_ATOMIC_UPDATES 294 unsigned long old, tmp; 295 296 __asm__ __volatile__( 297 "1: ldarx %0,0,%4\n\ 298 andi. %1,%0,%6\n\ 299 bne- 1b \n\ 300 or %0,%3,%0\n\ 301 stdcx. %0,0,%4\n\ 302 bne- 1b" 303 :"=&r" (old), "=&r" (tmp), "=m" (*ptep) 304 :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY) 305 :"cc"); 306 #else 307 unsigned long old = pte_val(*ptep); 308 *ptep = __pte(old | bits); 309 #endif 310 } 311 312 #define __HAVE_ARCH_PTE_SAME 313 #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0) 314 315 #define pte_ERROR(e) \ 316 pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) 317 #define pmd_ERROR(e) \ 318 pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) 319 #define pgd_ERROR(e) \ 320 pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 321 322 /* Encode and de-code a swap entry */ 323 #define MAX_SWAPFILES_CHECK() do { \ 324 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \ 325 /* \ 326 * Don't have overlapping bits with _PAGE_HPTEFLAGS \ 327 * We filter HPTEFLAGS on set_pte. \ 328 */ \ 329 BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \ 330 } while (0) 331 /* 332 * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT; 333 */ 334 #define SWP_TYPE_BITS 5 335 #define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \ 336 & ((1UL << SWP_TYPE_BITS) - 1)) 337 #define __swp_offset(x) ((x).val >> PTE_RPN_SHIFT) 338 #define __swp_entry(type, offset) ((swp_entry_t) { \ 339 ((type) << _PAGE_BIT_SWAP_TYPE) \ 340 | ((offset) << PTE_RPN_SHIFT) }) 341 342 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) }) 343 #define __swp_entry_to_pte(x) __pte((x).val) 344 345 extern int map_kernel_page(unsigned long ea, unsigned long pa, 346 unsigned long flags); 347 extern int __meminit vmemmap_create_mapping(unsigned long start, 348 unsigned long page_size, 349 unsigned long phys); 350 extern void vmemmap_remove_mapping(unsigned long start, 351 unsigned long page_size); 352 #endif /* __ASSEMBLY__ */ 353 354 #endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */ 355