1 #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_H 2 #define _ASM_POWERPC_NOHASH_64_PGTABLE_H 3 /* 4 * This file contains the functions and defines necessary to modify and use 5 * the ppc64 hashed page table. 6 */ 7 8 #ifdef CONFIG_PPC_64K_PAGES 9 #include <asm/nohash/64/pgtable-64k.h> 10 #else 11 #include <asm/nohash/64/pgtable-4k.h> 12 #endif 13 #include <asm/barrier.h> 14 15 #define FIRST_USER_ADDRESS 0UL 16 17 /* 18 * Size of EA range mapped by our pagetables. 19 */ 20 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \ 21 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT) 22 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE) 23 24 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 25 #define PMD_CACHE_INDEX (PMD_INDEX_SIZE + 1) 26 #else 27 #define PMD_CACHE_INDEX PMD_INDEX_SIZE 28 #endif 29 30 /* 31 * Define the address range of the kernel non-linear virtual area 32 */ 33 #define KERN_VIRT_START ASM_CONST(0x8000000000000000) 34 #define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000) 35 36 /* 37 * The vmalloc space starts at the beginning of that region, and 38 * occupies half of it on hash CPUs and a quarter of it on Book3E 39 * (we keep a quarter for the virtual memmap) 40 */ 41 #define VMALLOC_START KERN_VIRT_START 42 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 2) 43 #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE) 44 45 /* 46 * The second half of the kernel virtual space is used for IO mappings, 47 * it's itself carved into the PIO region (ISA and PHB IO space) and 48 * the ioremap space 49 * 50 * ISA_IO_BASE = KERN_IO_START, 64K reserved area 51 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces 52 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE 53 */ 54 #define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1)) 55 #define FULL_IO_SIZE 0x80000000ul 56 #define ISA_IO_BASE (KERN_IO_START) 57 #define ISA_IO_END (KERN_IO_START + 0x10000ul) 58 #define PHB_IO_BASE (ISA_IO_END) 59 #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE) 60 #define IOREMAP_BASE (PHB_IO_END) 61 #define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE) 62 63 64 /* 65 * Region IDs 66 */ 67 #define REGION_SHIFT 60UL 68 #define REGION_MASK (0xfUL << REGION_SHIFT) 69 #define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT) 70 71 #define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START)) 72 #define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET)) 73 #define VMEMMAP_REGION_ID (0xfUL) /* Server only */ 74 #define USER_REGION_ID (0UL) 75 76 /* 77 * Defines the address of the vmemap area, in its own region on 78 * hash table CPUs and after the vmalloc space on Book3E 79 */ 80 #define VMEMMAP_BASE VMALLOC_END 81 #define VMEMMAP_END KERN_IO_START 82 #define vmemmap ((struct page *)VMEMMAP_BASE) 83 84 85 /* 86 * Include the PTE bits definitions 87 */ 88 #include <asm/nohash/pte-book3e.h> 89 #include <asm/pte-common.h> 90 91 #ifdef CONFIG_PPC_MM_SLICES 92 #define HAVE_ARCH_UNMAPPED_AREA 93 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN 94 #endif /* CONFIG_PPC_MM_SLICES */ 95 96 #ifndef __ASSEMBLY__ 97 /* pte_clear moved to later in this file */ 98 99 #define PMD_BAD_BITS (PTE_TABLE_SIZE-1) 100 #define PUD_BAD_BITS (PMD_TABLE_SIZE-1) 101 102 static inline void pmd_set(pmd_t *pmdp, unsigned long val) 103 { 104 *pmdp = __pmd(val); 105 } 106 107 static inline void pmd_clear(pmd_t *pmdp) 108 { 109 *pmdp = __pmd(0); 110 } 111 112 static inline pte_t pmd_pte(pmd_t pmd) 113 { 114 return __pte(pmd_val(pmd)); 115 } 116 117 #define pmd_none(pmd) (!pmd_val(pmd)) 118 #define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \ 119 || (pmd_val(pmd) & PMD_BAD_BITS)) 120 #define pmd_present(pmd) (!pmd_none(pmd)) 121 #define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS) 122 extern struct page *pmd_page(pmd_t pmd); 123 124 static inline void pud_set(pud_t *pudp, unsigned long val) 125 { 126 *pudp = __pud(val); 127 } 128 129 static inline void pud_clear(pud_t *pudp) 130 { 131 *pudp = __pud(0); 132 } 133 134 #define pud_none(pud) (!pud_val(pud)) 135 #define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \ 136 || (pud_val(pud) & PUD_BAD_BITS)) 137 #define pud_present(pud) (pud_val(pud) != 0) 138 #define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS) 139 140 extern struct page *pud_page(pud_t pud); 141 142 static inline pte_t pud_pte(pud_t pud) 143 { 144 return __pte(pud_val(pud)); 145 } 146 147 static inline pud_t pte_pud(pte_t pte) 148 { 149 return __pud(pte_val(pte)); 150 } 151 #define pud_write(pud) pte_write(pud_pte(pud)) 152 #define pgd_write(pgd) pte_write(pgd_pte(pgd)) 153 154 static inline void pgd_set(pgd_t *pgdp, unsigned long val) 155 { 156 *pgdp = __pgd(val); 157 } 158 159 /* 160 * Find an entry in a page-table-directory. We combine the address region 161 * (the high order N bits) and the pgd portion of the address. 162 */ 163 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1)) 164 165 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) 166 167 #define pmd_offset(pudp,addr) \ 168 (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))) 169 170 #define pte_offset_kernel(dir,addr) \ 171 (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) 172 173 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr)) 174 #define pte_unmap(pte) do { } while(0) 175 176 /* to find an entry in a kernel page-table-directory */ 177 /* This now only contains the vmalloc pages */ 178 #define pgd_offset_k(address) pgd_offset(&init_mm, address) 179 extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr, 180 pte_t *ptep, unsigned long pte, int huge); 181 182 /* Atomic PTE updates */ 183 static inline unsigned long pte_update(struct mm_struct *mm, 184 unsigned long addr, 185 pte_t *ptep, unsigned long clr, 186 unsigned long set, 187 int huge) 188 { 189 #ifdef PTE_ATOMIC_UPDATES 190 unsigned long old, tmp; 191 192 __asm__ __volatile__( 193 "1: ldarx %0,0,%3 # pte_update\n\ 194 andi. %1,%0,%6\n\ 195 bne- 1b \n\ 196 andc %1,%0,%4 \n\ 197 or %1,%1,%7\n\ 198 stdcx. %1,0,%3 \n\ 199 bne- 1b" 200 : "=&r" (old), "=&r" (tmp), "=m" (*ptep) 201 : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY), "r" (set) 202 : "cc" ); 203 #else 204 unsigned long old = pte_val(*ptep); 205 *ptep = __pte((old & ~clr) | set); 206 #endif 207 /* huge pages use the old page table lock */ 208 if (!huge) 209 assert_pte_locked(mm, addr); 210 211 #ifdef CONFIG_PPC_STD_MMU_64 212 if (old & _PAGE_HASHPTE) 213 hpte_need_flush(mm, addr, ptep, old, huge); 214 #endif 215 216 return old; 217 } 218 219 static inline int __ptep_test_and_clear_young(struct mm_struct *mm, 220 unsigned long addr, pte_t *ptep) 221 { 222 unsigned long old; 223 224 if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0) 225 return 0; 226 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0); 227 return (old & _PAGE_ACCESSED) != 0; 228 } 229 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 230 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \ 231 ({ \ 232 int __r; \ 233 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \ 234 __r; \ 235 }) 236 237 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 238 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, 239 pte_t *ptep) 240 { 241 242 if ((pte_val(*ptep) & _PAGE_RW) == 0) 243 return; 244 245 pte_update(mm, addr, ptep, _PAGE_RW, 0, 0); 246 } 247 248 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, 249 unsigned long addr, pte_t *ptep) 250 { 251 if ((pte_val(*ptep) & _PAGE_RW) == 0) 252 return; 253 254 pte_update(mm, addr, ptep, _PAGE_RW, 0, 1); 255 } 256 257 /* 258 * We currently remove entries from the hashtable regardless of whether 259 * the entry was young or dirty. The generic routines only flush if the 260 * entry was young or dirty which is not good enough. 261 * 262 * We should be more intelligent about this but for the moment we override 263 * these functions and force a tlb flush unconditionally 264 */ 265 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 266 #define ptep_clear_flush_young(__vma, __address, __ptep) \ 267 ({ \ 268 int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \ 269 __ptep); \ 270 __young; \ 271 }) 272 273 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 274 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 275 unsigned long addr, pte_t *ptep) 276 { 277 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0); 278 return __pte(old); 279 } 280 281 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, 282 pte_t * ptep) 283 { 284 pte_update(mm, addr, ptep, ~0UL, 0, 0); 285 } 286 287 288 /* Set the dirty and/or accessed bits atomically in a linux PTE, this 289 * function doesn't need to flush the hash entry 290 */ 291 static inline void __ptep_set_access_flags(struct mm_struct *mm, 292 pte_t *ptep, pte_t entry, 293 unsigned long address) 294 { 295 unsigned long bits = pte_val(entry) & 296 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC); 297 298 #ifdef PTE_ATOMIC_UPDATES 299 unsigned long old, tmp; 300 301 __asm__ __volatile__( 302 "1: ldarx %0,0,%4\n\ 303 andi. %1,%0,%6\n\ 304 bne- 1b \n\ 305 or %0,%3,%0\n\ 306 stdcx. %0,0,%4\n\ 307 bne- 1b" 308 :"=&r" (old), "=&r" (tmp), "=m" (*ptep) 309 :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY) 310 :"cc"); 311 #else 312 unsigned long old = pte_val(*ptep); 313 *ptep = __pte(old | bits); 314 #endif 315 } 316 317 #define __HAVE_ARCH_PTE_SAME 318 #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0) 319 320 #define pte_ERROR(e) \ 321 pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) 322 #define pmd_ERROR(e) \ 323 pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) 324 #define pgd_ERROR(e) \ 325 pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 326 327 /* Encode and de-code a swap entry */ 328 #define MAX_SWAPFILES_CHECK() do { \ 329 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \ 330 /* \ 331 * Don't have overlapping bits with _PAGE_HPTEFLAGS \ 332 * We filter HPTEFLAGS on set_pte. \ 333 */ \ 334 BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \ 335 } while (0) 336 /* 337 * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT; 338 */ 339 #define SWP_TYPE_BITS 5 340 #define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \ 341 & ((1UL << SWP_TYPE_BITS) - 1)) 342 #define __swp_offset(x) ((x).val >> PTE_RPN_SHIFT) 343 #define __swp_entry(type, offset) ((swp_entry_t) { \ 344 ((type) << _PAGE_BIT_SWAP_TYPE) \ 345 | ((offset) << PTE_RPN_SHIFT) }) 346 347 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) }) 348 #define __swp_entry_to_pte(x) __pte((x).val) 349 350 extern int map_kernel_page(unsigned long ea, unsigned long pa, 351 unsigned long flags); 352 extern int __meminit vmemmap_create_mapping(unsigned long start, 353 unsigned long page_size, 354 unsigned long phys); 355 extern void vmemmap_remove_mapping(unsigned long start, 356 unsigned long page_size); 357 #endif /* __ASSEMBLY__ */ 358 359 #endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */ 360