1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_H 3 #define _ASM_POWERPC_NOHASH_64_PGTABLE_H 4 /* 5 * This file contains the functions and defines necessary to modify and use 6 * the ppc64 non-hashed page table. 7 */ 8 9 #include <asm/nohash/64/pgtable-4k.h> 10 #include <asm/barrier.h> 11 #include <asm/asm-const.h> 12 13 #ifdef CONFIG_PPC_64K_PAGES 14 #error "Page size not supported" 15 #endif 16 17 #define FIRST_USER_ADDRESS 0UL 18 19 /* 20 * Size of EA range mapped by our pagetables. 21 */ 22 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \ 23 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT) 24 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE) 25 26 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 27 #define PMD_CACHE_INDEX (PMD_INDEX_SIZE + 1) 28 #else 29 #define PMD_CACHE_INDEX PMD_INDEX_SIZE 30 #endif 31 #define PUD_CACHE_INDEX PUD_INDEX_SIZE 32 33 /* 34 * Define the address range of the kernel non-linear virtual area 35 */ 36 #define KERN_VIRT_START ASM_CONST(0x8000000000000000) 37 #define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000) 38 39 /* 40 * The vmalloc space starts at the beginning of that region, and 41 * occupies a quarter of it on Book3E 42 * (we keep a quarter for the virtual memmap) 43 */ 44 #define VMALLOC_START KERN_VIRT_START 45 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 2) 46 #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE) 47 48 /* 49 * The second half of the kernel virtual space is used for IO mappings, 50 * it's itself carved into the PIO region (ISA and PHB IO space) and 51 * the ioremap space 52 * 53 * ISA_IO_BASE = KERN_IO_START, 64K reserved area 54 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces 55 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE 56 */ 57 #define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1)) 58 #define FULL_IO_SIZE 0x80000000ul 59 #define ISA_IO_BASE (KERN_IO_START) 60 #define ISA_IO_END (KERN_IO_START + 0x10000ul) 61 #define PHB_IO_BASE (ISA_IO_END) 62 #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE) 63 #define IOREMAP_BASE (PHB_IO_END) 64 #define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE) 65 66 67 /* 68 * Region IDs 69 */ 70 #define REGION_SHIFT 60UL 71 #define REGION_MASK (0xfUL << REGION_SHIFT) 72 #define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT) 73 74 #define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START)) 75 #define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET)) 76 #define VMEMMAP_REGION_ID (0xfUL) /* Server only */ 77 #define USER_REGION_ID (0UL) 78 79 /* 80 * Defines the address of the vmemap area, in its own region on 81 * after the vmalloc space on Book3E 82 */ 83 #define VMEMMAP_BASE VMALLOC_END 84 #define VMEMMAP_END KERN_IO_START 85 #define vmemmap ((struct page *)VMEMMAP_BASE) 86 87 88 /* 89 * Include the PTE bits definitions 90 */ 91 #include <asm/nohash/pte-book3e.h> 92 #include <asm/pte-common.h> 93 94 #ifndef __ASSEMBLY__ 95 /* pte_clear moved to later in this file */ 96 97 #define PMD_BAD_BITS (PTE_TABLE_SIZE-1) 98 #define PUD_BAD_BITS (PMD_TABLE_SIZE-1) 99 100 static inline void pmd_set(pmd_t *pmdp, unsigned long val) 101 { 102 *pmdp = __pmd(val); 103 } 104 105 static inline void pmd_clear(pmd_t *pmdp) 106 { 107 *pmdp = __pmd(0); 108 } 109 110 static inline pte_t pmd_pte(pmd_t pmd) 111 { 112 return __pte(pmd_val(pmd)); 113 } 114 115 #define pmd_none(pmd) (!pmd_val(pmd)) 116 #define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \ 117 || (pmd_val(pmd) & PMD_BAD_BITS)) 118 #define pmd_present(pmd) (!pmd_none(pmd)) 119 #define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS) 120 extern struct page *pmd_page(pmd_t pmd); 121 122 static inline void pud_set(pud_t *pudp, unsigned long val) 123 { 124 *pudp = __pud(val); 125 } 126 127 static inline void pud_clear(pud_t *pudp) 128 { 129 *pudp = __pud(0); 130 } 131 132 #define pud_none(pud) (!pud_val(pud)) 133 #define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \ 134 || (pud_val(pud) & PUD_BAD_BITS)) 135 #define pud_present(pud) (pud_val(pud) != 0) 136 #define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS) 137 138 extern struct page *pud_page(pud_t pud); 139 140 static inline pte_t pud_pte(pud_t pud) 141 { 142 return __pte(pud_val(pud)); 143 } 144 145 static inline pud_t pte_pud(pte_t pte) 146 { 147 return __pud(pte_val(pte)); 148 } 149 #define pud_write(pud) pte_write(pud_pte(pud)) 150 #define pgd_write(pgd) pte_write(pgd_pte(pgd)) 151 152 static inline void pgd_set(pgd_t *pgdp, unsigned long val) 153 { 154 *pgdp = __pgd(val); 155 } 156 157 /* 158 * Find an entry in a page-table-directory. We combine the address region 159 * (the high order N bits) and the pgd portion of the address. 160 */ 161 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1)) 162 163 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) 164 165 #define pmd_offset(pudp,addr) \ 166 (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))) 167 168 #define pte_offset_kernel(dir,addr) \ 169 (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) 170 171 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr)) 172 #define pte_unmap(pte) do { } while(0) 173 174 /* to find an entry in a kernel page-table-directory */ 175 /* This now only contains the vmalloc pages */ 176 #define pgd_offset_k(address) pgd_offset(&init_mm, address) 177 178 /* Atomic PTE updates */ 179 static inline unsigned long pte_update(struct mm_struct *mm, 180 unsigned long addr, 181 pte_t *ptep, unsigned long clr, 182 unsigned long set, 183 int huge) 184 { 185 #ifdef PTE_ATOMIC_UPDATES 186 unsigned long old, tmp; 187 188 __asm__ __volatile__( 189 "1: ldarx %0,0,%3 # pte_update\n\ 190 andc %1,%0,%4 \n\ 191 or %1,%1,%6\n\ 192 stdcx. %1,0,%3 \n\ 193 bne- 1b" 194 : "=&r" (old), "=&r" (tmp), "=m" (*ptep) 195 : "r" (ptep), "r" (clr), "m" (*ptep), "r" (set) 196 : "cc" ); 197 #else 198 unsigned long old = pte_val(*ptep); 199 *ptep = __pte((old & ~clr) | set); 200 #endif 201 /* huge pages use the old page table lock */ 202 if (!huge) 203 assert_pte_locked(mm, addr); 204 205 return old; 206 } 207 208 static inline int pte_young(pte_t pte) 209 { 210 return pte_val(pte) & _PAGE_ACCESSED; 211 } 212 213 static inline int __ptep_test_and_clear_young(struct mm_struct *mm, 214 unsigned long addr, pte_t *ptep) 215 { 216 unsigned long old; 217 218 if (pte_young(*ptep)) 219 return 0; 220 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0); 221 return (old & _PAGE_ACCESSED) != 0; 222 } 223 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 224 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \ 225 ({ \ 226 int __r; \ 227 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \ 228 __r; \ 229 }) 230 231 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 232 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, 233 pte_t *ptep) 234 { 235 236 if ((pte_val(*ptep) & _PAGE_RW) == 0) 237 return; 238 239 pte_update(mm, addr, ptep, _PAGE_RW, 0, 0); 240 } 241 242 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, 243 unsigned long addr, pte_t *ptep) 244 { 245 if ((pte_val(*ptep) & _PAGE_RW) == 0) 246 return; 247 248 pte_update(mm, addr, ptep, _PAGE_RW, 0, 1); 249 } 250 251 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 252 #define ptep_clear_flush_young(__vma, __address, __ptep) \ 253 ({ \ 254 int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \ 255 __ptep); \ 256 __young; \ 257 }) 258 259 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 260 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 261 unsigned long addr, pte_t *ptep) 262 { 263 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0); 264 return __pte(old); 265 } 266 267 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, 268 pte_t * ptep) 269 { 270 pte_update(mm, addr, ptep, ~0UL, 0, 0); 271 } 272 273 274 /* Set the dirty and/or accessed bits atomically in a linux PTE */ 275 static inline void __ptep_set_access_flags(struct vm_area_struct *vma, 276 pte_t *ptep, pte_t entry, 277 unsigned long address, 278 int psize) 279 { 280 unsigned long bits = pte_val(entry) & 281 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC); 282 283 #ifdef PTE_ATOMIC_UPDATES 284 unsigned long old, tmp; 285 286 __asm__ __volatile__( 287 "1: ldarx %0,0,%4\n\ 288 or %0,%3,%0\n\ 289 stdcx. %0,0,%4\n\ 290 bne- 1b" 291 :"=&r" (old), "=&r" (tmp), "=m" (*ptep) 292 :"r" (bits), "r" (ptep), "m" (*ptep) 293 :"cc"); 294 #else 295 unsigned long old = pte_val(*ptep); 296 *ptep = __pte(old | bits); 297 #endif 298 299 flush_tlb_page(vma, address); 300 } 301 302 #define __HAVE_ARCH_PTE_SAME 303 #define pte_same(A,B) ((pte_val(A) ^ pte_val(B)) == 0) 304 305 #define pte_ERROR(e) \ 306 pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) 307 #define pmd_ERROR(e) \ 308 pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) 309 #define pgd_ERROR(e) \ 310 pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 311 312 /* Encode and de-code a swap entry */ 313 #define MAX_SWAPFILES_CHECK() do { \ 314 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \ 315 } while (0) 316 /* 317 * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT; 318 */ 319 #define SWP_TYPE_BITS 5 320 #define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \ 321 & ((1UL << SWP_TYPE_BITS) - 1)) 322 #define __swp_offset(x) ((x).val >> PTE_RPN_SHIFT) 323 #define __swp_entry(type, offset) ((swp_entry_t) { \ 324 ((type) << _PAGE_BIT_SWAP_TYPE) \ 325 | ((offset) << PTE_RPN_SHIFT) }) 326 327 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) }) 328 #define __swp_entry_to_pte(x) __pte((x).val) 329 330 extern int map_kernel_page(unsigned long ea, unsigned long pa, 331 unsigned long flags); 332 extern int __meminit vmemmap_create_mapping(unsigned long start, 333 unsigned long page_size, 334 unsigned long phys); 335 extern void vmemmap_remove_mapping(unsigned long start, 336 unsigned long page_size); 337 #endif /* __ASSEMBLY__ */ 338 339 #endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */ 340