1*dfc3095cSChristophe Leroy /* SPDX-License-Identifier: GPL-2.0 */ 2*dfc3095cSChristophe Leroy #ifndef _ASM_POWERPC_NOHASH_32_PTE_85xx_H 3*dfc3095cSChristophe Leroy #define _ASM_POWERPC_NOHASH_32_PTE_85xx_H 4*dfc3095cSChristophe Leroy #ifdef __KERNEL__ 5*dfc3095cSChristophe Leroy 6*dfc3095cSChristophe Leroy /* PTE bit definitions for Freescale BookE SW loaded TLB MMU based 7*dfc3095cSChristophe Leroy * processors 8*dfc3095cSChristophe Leroy * 9*dfc3095cSChristophe Leroy MMU Assist Register 3: 10*dfc3095cSChristophe Leroy 11*dfc3095cSChristophe Leroy 32 33 34 35 36 ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63 12*dfc3095cSChristophe Leroy RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR 13*dfc3095cSChristophe Leroy 14*dfc3095cSChristophe Leroy - PRESENT *must* be in the bottom three bits because swap cache 15*dfc3095cSChristophe Leroy entries use the top 29 bits. 16*dfc3095cSChristophe Leroy 17*dfc3095cSChristophe Leroy */ 18*dfc3095cSChristophe Leroy 19*dfc3095cSChristophe Leroy /* Definitions for FSL Book-E Cores */ 20*dfc3095cSChristophe Leroy #define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */ 21*dfc3095cSChristophe Leroy #define _PAGE_USER 0x00002 /* S: User page (maps to UR) */ 22*dfc3095cSChristophe Leroy #define _PAGE_RW 0x00004 /* S: Write permission (SW) */ 23*dfc3095cSChristophe Leroy #define _PAGE_DIRTY 0x00008 /* S: Page dirty */ 24*dfc3095cSChristophe Leroy #define _PAGE_EXEC 0x00010 /* H: SX permission */ 25*dfc3095cSChristophe Leroy #define _PAGE_ACCESSED 0x00020 /* S: Page referenced */ 26*dfc3095cSChristophe Leroy 27*dfc3095cSChristophe Leroy #define _PAGE_ENDIAN 0x00040 /* H: E bit */ 28*dfc3095cSChristophe Leroy #define _PAGE_GUARDED 0x00080 /* H: G bit */ 29*dfc3095cSChristophe Leroy #define _PAGE_COHERENT 0x00100 /* H: M bit */ 30*dfc3095cSChristophe Leroy #define _PAGE_NO_CACHE 0x00200 /* H: I bit */ 31*dfc3095cSChristophe Leroy #define _PAGE_WRITETHRU 0x00400 /* H: W bit */ 32*dfc3095cSChristophe Leroy #define _PAGE_SPECIAL 0x00800 /* S: Special page */ 33*dfc3095cSChristophe Leroy 34*dfc3095cSChristophe Leroy #define _PAGE_KERNEL_RO 0 35*dfc3095cSChristophe Leroy #define _PAGE_KERNEL_ROX _PAGE_EXEC 36*dfc3095cSChristophe Leroy #define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW) 37*dfc3095cSChristophe Leroy #define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC) 38*dfc3095cSChristophe Leroy 39*dfc3095cSChristophe Leroy /* No page size encoding in the linux PTE */ 40*dfc3095cSChristophe Leroy #define _PAGE_PSIZE 0 41*dfc3095cSChristophe Leroy 42*dfc3095cSChristophe Leroy #define _PMD_PRESENT 0 43*dfc3095cSChristophe Leroy #define _PMD_PRESENT_MASK (PAGE_MASK) 44*dfc3095cSChristophe Leroy #define _PMD_BAD (~PAGE_MASK) 45*dfc3095cSChristophe Leroy #define _PMD_USER 0 46*dfc3095cSChristophe Leroy 47*dfc3095cSChristophe Leroy #define _PTE_NONE_MASK 0 48*dfc3095cSChristophe Leroy 49*dfc3095cSChristophe Leroy #define PTE_WIMGE_SHIFT (6) 50*dfc3095cSChristophe Leroy 51*dfc3095cSChristophe Leroy /* 52*dfc3095cSChristophe Leroy * We define 2 sets of base prot bits, one for basic pages (ie, 53*dfc3095cSChristophe Leroy * cacheable kernel and user pages) and one for non cacheable 54*dfc3095cSChristophe Leroy * pages. We always set _PAGE_COHERENT when SMP is enabled or 55*dfc3095cSChristophe Leroy * the processor might need it for DMA coherency. 56*dfc3095cSChristophe Leroy */ 57*dfc3095cSChristophe Leroy #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED) 58*dfc3095cSChristophe Leroy #if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC) 59*dfc3095cSChristophe Leroy #define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT) 60*dfc3095cSChristophe Leroy #else 61*dfc3095cSChristophe Leroy #define _PAGE_BASE (_PAGE_BASE_NC) 62*dfc3095cSChristophe Leroy #endif 63*dfc3095cSChristophe Leroy 64*dfc3095cSChristophe Leroy /* Permission masks used to generate the __P and __S table */ 65*dfc3095cSChristophe Leroy #define PAGE_NONE __pgprot(_PAGE_BASE) 66*dfc3095cSChristophe Leroy #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW) 67*dfc3095cSChristophe Leroy #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC) 68*dfc3095cSChristophe Leroy #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER) 69*dfc3095cSChristophe Leroy #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) 70*dfc3095cSChristophe Leroy #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER) 71*dfc3095cSChristophe Leroy #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) 72*dfc3095cSChristophe Leroy 73*dfc3095cSChristophe Leroy #endif /* __KERNEL__ */ 74*dfc3095cSChristophe Leroy #endif /* _ASM_POWERPC_NOHASH_32_PTE_FSL_85xx_H */ 75