1 /* 2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation 3 * Rewrite, cleanup: 4 * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 21 #ifndef _ASM_IOMMU_H 22 #define _ASM_IOMMU_H 23 #ifdef __KERNEL__ 24 25 #include <linux/compiler.h> 26 #include <linux/spinlock.h> 27 #include <linux/device.h> 28 #include <linux/dma-mapping.h> 29 #include <linux/bitops.h> 30 #include <asm/machdep.h> 31 #include <asm/types.h> 32 #include <asm/pci-bridge.h> 33 34 #define IOMMU_PAGE_SHIFT_4K 12 35 #define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K) 36 #define IOMMU_PAGE_MASK_4K (~((1 << IOMMU_PAGE_SHIFT_4K) - 1)) 37 #define IOMMU_PAGE_ALIGN_4K(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE_4K) 38 39 #define IOMMU_PAGE_SIZE(tblptr) (ASM_CONST(1) << (tblptr)->it_page_shift) 40 #define IOMMU_PAGE_MASK(tblptr) (~((1 << (tblptr)->it_page_shift) - 1)) 41 #define IOMMU_PAGE_ALIGN(addr, tblptr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE(tblptr)) 42 43 /* Boot time flags */ 44 extern int iommu_is_off; 45 extern int iommu_force_on; 46 47 struct iommu_table_ops { 48 /* 49 * When called with direction==DMA_NONE, it is equal to clear(). 50 * uaddr is a linear map address. 51 */ 52 int (*set)(struct iommu_table *tbl, 53 long index, long npages, 54 unsigned long uaddr, 55 enum dma_data_direction direction, 56 unsigned long attrs); 57 #ifdef CONFIG_IOMMU_API 58 /* 59 * Exchanges existing TCE with new TCE plus direction bits; 60 * returns old TCE and DMA direction mask. 61 * @tce is a physical address. 62 */ 63 int (*exchange)(struct iommu_table *tbl, 64 long index, 65 unsigned long *hpa, 66 enum dma_data_direction *direction); 67 #endif 68 void (*clear)(struct iommu_table *tbl, 69 long index, long npages); 70 /* get() returns a physical address */ 71 unsigned long (*get)(struct iommu_table *tbl, long index); 72 void (*flush)(struct iommu_table *tbl); 73 void (*free)(struct iommu_table *tbl); 74 }; 75 76 /* These are used by VIO */ 77 extern struct iommu_table_ops iommu_table_lpar_multi_ops; 78 extern struct iommu_table_ops iommu_table_pseries_ops; 79 80 /* 81 * IOMAP_MAX_ORDER defines the largest contiguous block 82 * of dma space we can get. IOMAP_MAX_ORDER = 13 83 * allows up to 2**12 pages (4096 * 4096) = 16 MB 84 */ 85 #define IOMAP_MAX_ORDER 13 86 87 #define IOMMU_POOL_HASHBITS 2 88 #define IOMMU_NR_POOLS (1 << IOMMU_POOL_HASHBITS) 89 90 struct iommu_pool { 91 unsigned long start; 92 unsigned long end; 93 unsigned long hint; 94 spinlock_t lock; 95 } ____cacheline_aligned_in_smp; 96 97 struct iommu_table { 98 unsigned long it_busno; /* Bus number this table belongs to */ 99 unsigned long it_size; /* Size of iommu table in entries */ 100 unsigned long it_indirect_levels; 101 unsigned long it_level_size; 102 unsigned long it_allocated_size; 103 unsigned long it_offset; /* Offset into global table */ 104 unsigned long it_base; /* mapped address of tce table */ 105 unsigned long it_index; /* which iommu table this is */ 106 unsigned long it_type; /* type: PCI or Virtual Bus */ 107 unsigned long it_blocksize; /* Entries in each block (cacheline) */ 108 unsigned long poolsize; 109 unsigned long nr_pools; 110 struct iommu_pool large_pool; 111 struct iommu_pool pools[IOMMU_NR_POOLS]; 112 unsigned long *it_map; /* A simple allocation bitmap for now */ 113 unsigned long it_page_shift;/* table iommu page size */ 114 struct list_head it_group_list;/* List of iommu_table_group_link */ 115 unsigned long *it_userspace; /* userspace view of the table */ 116 struct iommu_table_ops *it_ops; 117 }; 118 119 #define IOMMU_TABLE_USERSPACE_ENTRY(tbl, entry) \ 120 ((tbl)->it_userspace ? \ 121 &((tbl)->it_userspace[(entry) - (tbl)->it_offset]) : \ 122 NULL) 123 124 /* Pure 2^n version of get_order */ 125 static inline __attribute_const__ 126 int get_iommu_order(unsigned long size, struct iommu_table *tbl) 127 { 128 return __ilog2((size - 1) >> tbl->it_page_shift) + 1; 129 } 130 131 132 struct scatterlist; 133 134 #ifdef CONFIG_PPC64 135 136 static inline void set_iommu_table_base(struct device *dev, 137 struct iommu_table *base) 138 { 139 dev->archdata.iommu_table_base = base; 140 } 141 142 static inline void *get_iommu_table_base(struct device *dev) 143 { 144 return dev->archdata.iommu_table_base; 145 } 146 147 extern int dma_iommu_dma_supported(struct device *dev, u64 mask); 148 149 /* Frees table for an individual device node */ 150 extern void iommu_free_table(struct iommu_table *tbl, const char *node_name); 151 152 /* Initializes an iommu_table based in values set in the passed-in 153 * structure 154 */ 155 extern struct iommu_table *iommu_init_table(struct iommu_table * tbl, 156 int nid); 157 #define IOMMU_TABLE_GROUP_MAX_TABLES 2 158 159 struct iommu_table_group; 160 161 struct iommu_table_group_ops { 162 unsigned long (*get_table_size)( 163 __u32 page_shift, 164 __u64 window_size, 165 __u32 levels); 166 long (*create_table)(struct iommu_table_group *table_group, 167 int num, 168 __u32 page_shift, 169 __u64 window_size, 170 __u32 levels, 171 struct iommu_table **ptbl); 172 long (*set_window)(struct iommu_table_group *table_group, 173 int num, 174 struct iommu_table *tblnew); 175 long (*unset_window)(struct iommu_table_group *table_group, 176 int num); 177 /* Switch ownership from platform code to external user (e.g. VFIO) */ 178 void (*take_ownership)(struct iommu_table_group *table_group); 179 /* Switch ownership from external user (e.g. VFIO) back to core */ 180 void (*release_ownership)(struct iommu_table_group *table_group); 181 }; 182 183 struct iommu_table_group_link { 184 struct list_head next; 185 struct rcu_head rcu; 186 struct iommu_table_group *table_group; 187 }; 188 189 struct iommu_table_group { 190 /* IOMMU properties */ 191 __u32 tce32_start; 192 __u32 tce32_size; 193 __u64 pgsizes; /* Bitmap of supported page sizes */ 194 __u32 max_dynamic_windows_supported; 195 __u32 max_levels; 196 197 struct iommu_group *group; 198 struct iommu_table *tables[IOMMU_TABLE_GROUP_MAX_TABLES]; 199 struct iommu_table_group_ops *ops; 200 }; 201 202 #ifdef CONFIG_IOMMU_API 203 204 extern void iommu_register_group(struct iommu_table_group *table_group, 205 int pci_domain_number, unsigned long pe_num); 206 extern int iommu_add_device(struct device *dev); 207 extern void iommu_del_device(struct device *dev); 208 extern int __init tce_iommu_bus_notifier_init(void); 209 extern long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry, 210 unsigned long *hpa, enum dma_data_direction *direction); 211 #else 212 static inline void iommu_register_group(struct iommu_table_group *table_group, 213 int pci_domain_number, 214 unsigned long pe_num) 215 { 216 } 217 218 static inline int iommu_add_device(struct device *dev) 219 { 220 return 0; 221 } 222 223 static inline void iommu_del_device(struct device *dev) 224 { 225 } 226 227 static inline int __init tce_iommu_bus_notifier_init(void) 228 { 229 return 0; 230 } 231 #endif /* !CONFIG_IOMMU_API */ 232 233 #else 234 235 static inline void *get_iommu_table_base(struct device *dev) 236 { 237 return NULL; 238 } 239 240 static inline int dma_iommu_dma_supported(struct device *dev, u64 mask) 241 { 242 return 0; 243 } 244 245 #endif /* CONFIG_PPC64 */ 246 247 extern int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl, 248 struct scatterlist *sglist, int nelems, 249 unsigned long mask, 250 enum dma_data_direction direction, 251 unsigned long attrs); 252 extern void ppc_iommu_unmap_sg(struct iommu_table *tbl, 253 struct scatterlist *sglist, 254 int nelems, 255 enum dma_data_direction direction, 256 unsigned long attrs); 257 258 extern void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl, 259 size_t size, dma_addr_t *dma_handle, 260 unsigned long mask, gfp_t flag, int node); 261 extern void iommu_free_coherent(struct iommu_table *tbl, size_t size, 262 void *vaddr, dma_addr_t dma_handle); 263 extern dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl, 264 struct page *page, unsigned long offset, 265 size_t size, unsigned long mask, 266 enum dma_data_direction direction, 267 unsigned long attrs); 268 extern void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle, 269 size_t size, enum dma_data_direction direction, 270 unsigned long attrs); 271 272 extern void iommu_init_early_pSeries(void); 273 extern void iommu_init_early_dart(struct pci_controller_ops *controller_ops); 274 extern void iommu_init_early_pasemi(void); 275 276 #if defined(CONFIG_PPC64) && defined(CONFIG_PM) 277 static inline void iommu_save(void) 278 { 279 if (ppc_md.iommu_save) 280 ppc_md.iommu_save(); 281 } 282 283 static inline void iommu_restore(void) 284 { 285 if (ppc_md.iommu_restore) 286 ppc_md.iommu_restore(); 287 } 288 #endif 289 290 /* The API to support IOMMU operations for VFIO */ 291 extern int iommu_tce_clear_param_check(struct iommu_table *tbl, 292 unsigned long ioba, unsigned long tce_value, 293 unsigned long npages); 294 extern int iommu_tce_put_param_check(struct iommu_table *tbl, 295 unsigned long ioba, unsigned long tce); 296 297 extern void iommu_flush_tce(struct iommu_table *tbl); 298 extern int iommu_take_ownership(struct iommu_table *tbl); 299 extern void iommu_release_ownership(struct iommu_table *tbl); 300 301 extern enum dma_data_direction iommu_tce_direction(unsigned long tce); 302 extern unsigned long iommu_direction_to_tce_perm(enum dma_data_direction dir); 303 304 #endif /* __KERNEL__ */ 305 #endif /* _ASM_IOMMU_H */ 306