1 #ifndef __ASM_POWERPC_IMC_PMU_H 2 #define __ASM_POWERPC_IMC_PMU_H 3 4 /* 5 * IMC Nest Performance Monitor counter support. 6 * 7 * Copyright (C) 2017 Madhavan Srinivasan, IBM Corporation. 8 * (C) 2017 Anju T Sudhakar, IBM Corporation. 9 * (C) 2017 Hemant K Shaw, IBM Corporation. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * as published by the Free Software Foundation; either version 14 * 2 of the License, or later version. 15 */ 16 17 #include <linux/perf_event.h> 18 #include <linux/slab.h> 19 #include <linux/of.h> 20 #include <linux/io.h> 21 #include <asm/opal.h> 22 23 /* 24 * For static allocation of some of the structures. 25 */ 26 #define IMC_MAX_PMUS 32 27 28 /* 29 * Compatibility macros for IMC devices 30 */ 31 #define IMC_DTB_COMPAT "ibm,opal-in-memory-counters" 32 #define IMC_DTB_UNIT_COMPAT "ibm,imc-counters" 33 34 35 /* 36 * LDBAR: Counter address and Enable/Disable macro. 37 * perf/imc-pmu.c has the LDBAR layout information. 38 */ 39 #define THREAD_IMC_LDBAR_MASK 0x0003ffffffffe000ULL 40 #define THREAD_IMC_ENABLE 0x8000000000000000ULL 41 42 /* 43 * Structure to hold memory address information for imc units. 44 */ 45 struct imc_mem_info { 46 u64 *vbase; 47 u32 id; 48 }; 49 50 /* 51 * Place holder for nest pmu events and values. 52 */ 53 struct imc_events { 54 u32 value; 55 char *name; 56 char *unit; 57 char *scale; 58 }; 59 60 /* Event attribute array index */ 61 #define IMC_FORMAT_ATTR 0 62 #define IMC_EVENT_ATTR 1 63 #define IMC_CPUMASK_ATTR 2 64 #define IMC_NULL_ATTR 3 65 66 /* PMU Format attribute macros */ 67 #define IMC_EVENT_OFFSET_MASK 0xffffffffULL 68 69 /* 70 * Device tree parser code detects IMC pmu support and 71 * registers new IMC pmus. This structure will hold the 72 * pmu functions, events, counter memory information 73 * and attrs for each imc pmu and will be referenced at 74 * the time of pmu registration. 75 */ 76 struct imc_pmu { 77 struct pmu pmu; 78 struct imc_mem_info *mem_info; 79 struct imc_events **events; 80 /* 81 * Attribute groups for the PMU. Slot 0 used for 82 * format attribute, slot 1 used for cpusmask attribute, 83 * slot 2 used for event attribute. Slot 3 keep as 84 * NULL. 85 */ 86 const struct attribute_group *attr_groups[4]; 87 u32 counter_mem_size; 88 int domain; 89 /* 90 * flag to notify whether the memory is mmaped 91 * or allocated by kernel. 92 */ 93 bool imc_counter_mmaped; 94 }; 95 96 /* 97 * Structure to hold id, lock and reference count for the imc events which 98 * are inited. 99 */ 100 struct imc_pmu_ref { 101 struct mutex lock; 102 unsigned int id; 103 int refc; 104 }; 105 106 /* 107 * In-Memory Collection Counters type. 108 * Data comes from Device tree. 109 * Three device type are supported. 110 */ 111 112 enum { 113 IMC_TYPE_THREAD = 0x1, 114 IMC_TYPE_CORE = 0x4, 115 IMC_TYPE_CHIP = 0x10, 116 }; 117 118 /* 119 * Domains for IMC PMUs 120 */ 121 #define IMC_DOMAIN_NEST 1 122 #define IMC_DOMAIN_CORE 2 123 #define IMC_DOMAIN_THREAD 3 124 125 extern int init_imc_pmu(struct device_node *parent, 126 struct imc_pmu *pmu_ptr, int pmu_id); 127 extern void thread_imc_disable(void); 128 #endif /* __ASM_POWERPC_IMC_PMU_H */ 129