1 #ifndef __ASM_POWERPC_IMC_PMU_H 2 #define __ASM_POWERPC_IMC_PMU_H 3 4 /* 5 * IMC Nest Performance Monitor counter support. 6 * 7 * Copyright (C) 2017 Madhavan Srinivasan, IBM Corporation. 8 * (C) 2017 Anju T Sudhakar, IBM Corporation. 9 * (C) 2017 Hemant K Shaw, IBM Corporation. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * as published by the Free Software Foundation; either version 14 * 2 of the License, or later version. 15 */ 16 17 #include <linux/perf_event.h> 18 #include <linux/slab.h> 19 #include <linux/of.h> 20 #include <linux/io.h> 21 #include <asm/opal.h> 22 23 /* 24 * Compatibility macros for IMC devices 25 */ 26 #define IMC_DTB_COMPAT "ibm,opal-in-memory-counters" 27 #define IMC_DTB_UNIT_COMPAT "ibm,imc-counters" 28 29 30 /* 31 * LDBAR: Counter address and Enable/Disable macro. 32 * perf/imc-pmu.c has the LDBAR layout information. 33 */ 34 #define THREAD_IMC_LDBAR_MASK 0x0003ffffffffe000ULL 35 #define THREAD_IMC_ENABLE 0x8000000000000000ULL 36 37 /* 38 * For debugfs interface for imc-mode and imc-command 39 */ 40 #define IMC_CNTL_BLK_OFFSET 0x3FC00 41 #define IMC_CNTL_BLK_CMD_OFFSET 8 42 #define IMC_CNTL_BLK_MODE_OFFSET 32 43 44 /* 45 * Structure to hold memory address information for imc units. 46 */ 47 struct imc_mem_info { 48 u64 *vbase; 49 u32 id; 50 }; 51 52 /* 53 * Place holder for nest pmu events and values. 54 */ 55 struct imc_events { 56 u32 value; 57 char *name; 58 char *unit; 59 char *scale; 60 }; 61 62 /* Event attribute array index */ 63 #define IMC_FORMAT_ATTR 0 64 #define IMC_EVENT_ATTR 1 65 #define IMC_CPUMASK_ATTR 2 66 #define IMC_NULL_ATTR 3 67 68 /* PMU Format attribute macros */ 69 #define IMC_EVENT_OFFSET_MASK 0xffffffffULL 70 71 /* 72 * Device tree parser code detects IMC pmu support and 73 * registers new IMC pmus. This structure will hold the 74 * pmu functions, events, counter memory information 75 * and attrs for each imc pmu and will be referenced at 76 * the time of pmu registration. 77 */ 78 struct imc_pmu { 79 struct pmu pmu; 80 struct imc_mem_info *mem_info; 81 struct imc_events *events; 82 /* 83 * Attribute groups for the PMU. Slot 0 used for 84 * format attribute, slot 1 used for cpusmask attribute, 85 * slot 2 used for event attribute. Slot 3 keep as 86 * NULL. 87 */ 88 const struct attribute_group *attr_groups[4]; 89 u32 counter_mem_size; 90 int domain; 91 /* 92 * flag to notify whether the memory is mmaped 93 * or allocated by kernel. 94 */ 95 bool imc_counter_mmaped; 96 }; 97 98 /* 99 * Structure to hold id, lock and reference count for the imc events which 100 * are inited. 101 */ 102 struct imc_pmu_ref { 103 struct mutex lock; 104 unsigned int id; 105 int refc; 106 }; 107 108 /* 109 * In-Memory Collection Counters type. 110 * Data comes from Device tree. 111 * Three device type are supported. 112 */ 113 114 enum { 115 IMC_TYPE_THREAD = 0x1, 116 IMC_TYPE_CORE = 0x4, 117 IMC_TYPE_CHIP = 0x10, 118 }; 119 120 /* 121 * Domains for IMC PMUs 122 */ 123 #define IMC_DOMAIN_NEST 1 124 #define IMC_DOMAIN_CORE 2 125 #define IMC_DOMAIN_THREAD 3 126 127 extern int init_imc_pmu(struct device_node *parent, 128 struct imc_pmu *pmu_ptr, int pmu_id); 129 extern void thread_imc_disable(void); 130 extern int get_max_nest_dev(void); 131 extern void unregister_thread_imc(void); 132 #endif /* __ASM_POWERPC_IMC_PMU_H */ 133