1 /* 2 * PowerPC BookIII S hardware breakpoint definitions 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17 * 18 * Copyright 2010, IBM Corporation. 19 * Author: K.Prasad <prasad@linux.vnet.ibm.com> 20 * 21 */ 22 23 #ifndef _PPC_BOOK3S_64_HW_BREAKPOINT_H 24 #define _PPC_BOOK3S_64_HW_BREAKPOINT_H 25 26 #ifdef __KERNEL__ 27 struct arch_hw_breakpoint { 28 unsigned long address; 29 u16 type; 30 u16 len; /* length of the target data symbol */ 31 }; 32 33 /* Note: Don't change the the first 6 bits below as they are in the same order 34 * as the dabr and dabrx. 35 */ 36 #define HW_BRK_TYPE_READ 0x01 37 #define HW_BRK_TYPE_WRITE 0x02 38 #define HW_BRK_TYPE_TRANSLATE 0x04 39 #define HW_BRK_TYPE_USER 0x08 40 #define HW_BRK_TYPE_KERNEL 0x10 41 #define HW_BRK_TYPE_HYP 0x20 42 #define HW_BRK_TYPE_EXTRANEOUS_IRQ 0x80 43 44 /* bits that overlap with the bottom 3 bits of the dabr */ 45 #define HW_BRK_TYPE_RDWR (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE) 46 #define HW_BRK_TYPE_DABR (HW_BRK_TYPE_RDWR | HW_BRK_TYPE_TRANSLATE) 47 #define HW_BRK_TYPE_PRIV_ALL (HW_BRK_TYPE_USER | HW_BRK_TYPE_KERNEL | \ 48 HW_BRK_TYPE_HYP) 49 50 #ifdef CONFIG_HAVE_HW_BREAKPOINT 51 #include <linux/kdebug.h> 52 #include <asm/reg.h> 53 #include <asm/debug.h> 54 55 struct perf_event_attr; 56 struct perf_event; 57 struct pmu; 58 struct perf_sample_data; 59 struct task_struct; 60 61 #define HW_BREAKPOINT_ALIGN 0x7 62 63 extern int hw_breakpoint_slots(int type); 64 extern int arch_bp_generic_fields(int type, int *gen_bp_type); 65 extern int arch_check_bp_in_kernelspace(struct arch_hw_breakpoint *hw); 66 extern int hw_breakpoint_arch_parse(struct perf_event *bp, 67 const struct perf_event_attr *attr, 68 struct arch_hw_breakpoint *hw); 69 extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused, 70 unsigned long val, void *data); 71 int arch_install_hw_breakpoint(struct perf_event *bp); 72 void arch_uninstall_hw_breakpoint(struct perf_event *bp); 73 void arch_unregister_hw_breakpoint(struct perf_event *bp); 74 void hw_breakpoint_pmu_read(struct perf_event *bp); 75 extern void flush_ptrace_hw_breakpoint(struct task_struct *tsk); 76 77 extern struct pmu perf_ops_bp; 78 extern void ptrace_triggered(struct perf_event *bp, 79 struct perf_sample_data *data, struct pt_regs *regs); 80 static inline void hw_breakpoint_disable(void) 81 { 82 struct arch_hw_breakpoint brk; 83 84 brk.address = 0; 85 brk.type = 0; 86 brk.len = 0; 87 if (ppc_breakpoint_available()) 88 __set_breakpoint(&brk); 89 } 90 extern void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs); 91 int hw_breakpoint_handler(struct die_args *args); 92 93 extern int set_dawr(struct arch_hw_breakpoint *brk); 94 extern bool dawr_force_enable; 95 static inline bool dawr_enabled(void) 96 { 97 return dawr_force_enable; 98 } 99 100 #else /* CONFIG_HAVE_HW_BREAKPOINT */ 101 static inline void hw_breakpoint_disable(void) { } 102 static inline void thread_change_pc(struct task_struct *tsk, 103 struct pt_regs *regs) { } 104 static inline bool dawr_enabled(void) { return false; } 105 #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 106 #endif /* __KERNEL__ */ 107 #endif /* _PPC_BOOK3S_64_HW_BREAKPOINT_H */ 108