xref: /openbmc/linux/arch/powerpc/include/asm/futex.h (revision 74ce1896)
1 #ifndef _ASM_POWERPC_FUTEX_H
2 #define _ASM_POWERPC_FUTEX_H
3 
4 #ifdef __KERNEL__
5 
6 #include <linux/futex.h>
7 #include <linux/uaccess.h>
8 #include <asm/errno.h>
9 #include <asm/synch.h>
10 #include <asm/asm-compat.h>
11 
12 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
13   __asm__ __volatile ( \
14 	PPC_ATOMIC_ENTRY_BARRIER \
15 "1:	lwarx	%0,0,%2\n" \
16 	insn \
17 	PPC405_ERR77(0, %2) \
18 "2:	stwcx.	%1,0,%2\n" \
19 	"bne-	1b\n" \
20 	PPC_ATOMIC_EXIT_BARRIER \
21 	"li	%1,0\n" \
22 "3:	.section .fixup,\"ax\"\n" \
23 "4:	li	%1,%3\n" \
24 	"b	3b\n" \
25 	".previous\n" \
26 	EX_TABLE(1b, 4b) \
27 	EX_TABLE(2b, 4b) \
28 	: "=&r" (oldval), "=&r" (ret) \
29 	: "b" (uaddr), "i" (-EFAULT), "r" (oparg) \
30 	: "cr0", "memory")
31 
32 static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
33 		u32 __user *uaddr)
34 {
35 	int oldval = 0, ret;
36 
37 	pagefault_disable();
38 
39 	switch (op) {
40 	case FUTEX_OP_SET:
41 		__futex_atomic_op("mr %1,%4\n", ret, oldval, uaddr, oparg);
42 		break;
43 	case FUTEX_OP_ADD:
44 		__futex_atomic_op("add %1,%0,%4\n", ret, oldval, uaddr, oparg);
45 		break;
46 	case FUTEX_OP_OR:
47 		__futex_atomic_op("or %1,%0,%4\n", ret, oldval, uaddr, oparg);
48 		break;
49 	case FUTEX_OP_ANDN:
50 		__futex_atomic_op("andc %1,%0,%4\n", ret, oldval, uaddr, oparg);
51 		break;
52 	case FUTEX_OP_XOR:
53 		__futex_atomic_op("xor %1,%0,%4\n", ret, oldval, uaddr, oparg);
54 		break;
55 	default:
56 		ret = -ENOSYS;
57 	}
58 
59 	pagefault_enable();
60 
61 	if (!ret)
62 		*oval = oldval;
63 
64 	return ret;
65 }
66 
67 static inline int
68 futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
69 			      u32 oldval, u32 newval)
70 {
71 	int ret = 0;
72 	u32 prev;
73 
74 	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
75 		return -EFAULT;
76 
77         __asm__ __volatile__ (
78         PPC_ATOMIC_ENTRY_BARRIER
79 "1:     lwarx   %1,0,%3         # futex_atomic_cmpxchg_inatomic\n\
80         cmpw    0,%1,%4\n\
81         bne-    3f\n"
82         PPC405_ERR77(0,%3)
83 "2:     stwcx.  %5,0,%3\n\
84         bne-    1b\n"
85         PPC_ATOMIC_EXIT_BARRIER
86 "3:	.section .fixup,\"ax\"\n\
87 4:	li	%0,%6\n\
88 	b	3b\n\
89 	.previous\n"
90 	EX_TABLE(1b, 4b)
91 	EX_TABLE(2b, 4b)
92         : "+r" (ret), "=&r" (prev), "+m" (*uaddr)
93         : "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT)
94         : "cc", "memory");
95 
96 	*uval = prev;
97         return ret;
98 }
99 
100 #endif /* __KERNEL__ */
101 #endif /* _ASM_POWERPC_FUTEX_H */
102