1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_POWERPC_FUTEX_H 3 #define _ASM_POWERPC_FUTEX_H 4 5 #ifdef __KERNEL__ 6 7 #include <linux/futex.h> 8 #include <linux/uaccess.h> 9 #include <asm/errno.h> 10 #include <asm/synch.h> 11 #include <asm/asm-405.h> 12 13 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ 14 __asm__ __volatile ( \ 15 PPC_ATOMIC_ENTRY_BARRIER \ 16 "1: lwarx %0,0,%2\n" \ 17 insn \ 18 PPC405_ERR77(0, %2) \ 19 "2: stwcx. %1,0,%2\n" \ 20 "bne- 1b\n" \ 21 PPC_ATOMIC_EXIT_BARRIER \ 22 "li %1,0\n" \ 23 "3: .section .fixup,\"ax\"\n" \ 24 "4: li %1,%3\n" \ 25 "b 3b\n" \ 26 ".previous\n" \ 27 EX_TABLE(1b, 4b) \ 28 EX_TABLE(2b, 4b) \ 29 : "=&r" (oldval), "=&r" (ret) \ 30 : "b" (uaddr), "i" (-EFAULT), "r" (oparg) \ 31 : "cr0", "memory") 32 33 static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval, 34 u32 __user *uaddr) 35 { 36 int oldval = 0, ret; 37 38 if (!access_ok(uaddr, sizeof(u32))) 39 return -EFAULT; 40 allow_read_write_user(uaddr, uaddr, sizeof(*uaddr)); 41 42 switch (op) { 43 case FUTEX_OP_SET: 44 __futex_atomic_op("mr %1,%4\n", ret, oldval, uaddr, oparg); 45 break; 46 case FUTEX_OP_ADD: 47 __futex_atomic_op("add %1,%0,%4\n", ret, oldval, uaddr, oparg); 48 break; 49 case FUTEX_OP_OR: 50 __futex_atomic_op("or %1,%0,%4\n", ret, oldval, uaddr, oparg); 51 break; 52 case FUTEX_OP_ANDN: 53 __futex_atomic_op("andc %1,%0,%4\n", ret, oldval, uaddr, oparg); 54 break; 55 case FUTEX_OP_XOR: 56 __futex_atomic_op("xor %1,%0,%4\n", ret, oldval, uaddr, oparg); 57 break; 58 default: 59 ret = -ENOSYS; 60 } 61 62 *oval = oldval; 63 64 prevent_read_write_user(uaddr, uaddr, sizeof(*uaddr)); 65 return ret; 66 } 67 68 static inline int 69 futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, 70 u32 oldval, u32 newval) 71 { 72 int ret = 0; 73 u32 prev; 74 75 if (!access_ok(uaddr, sizeof(u32))) 76 return -EFAULT; 77 78 allow_read_write_user(uaddr, uaddr, sizeof(*uaddr)); 79 80 __asm__ __volatile__ ( 81 PPC_ATOMIC_ENTRY_BARRIER 82 "1: lwarx %1,0,%3 # futex_atomic_cmpxchg_inatomic\n\ 83 cmpw 0,%1,%4\n\ 84 bne- 3f\n" 85 PPC405_ERR77(0,%3) 86 "2: stwcx. %5,0,%3\n\ 87 bne- 1b\n" 88 PPC_ATOMIC_EXIT_BARRIER 89 "3: .section .fixup,\"ax\"\n\ 90 4: li %0,%6\n\ 91 b 3b\n\ 92 .previous\n" 93 EX_TABLE(1b, 4b) 94 EX_TABLE(2b, 4b) 95 : "+r" (ret), "=&r" (prev), "+m" (*uaddr) 96 : "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT) 97 : "cc", "memory"); 98 99 *uval = prev; 100 prevent_read_write_user(uaddr, uaddr, sizeof(*uaddr)); 101 102 return ret; 103 } 104 105 #endif /* __KERNEL__ */ 106 #endif /* _ASM_POWERPC_FUTEX_H */ 107