1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 #include <asm/head-64.h> 38 39 /* PACA save area offsets (exgen, exmc, etc) */ 40 #define EX_R9 0 41 #define EX_R10 8 42 #define EX_R11 16 43 #define EX_R12 24 44 #define EX_R13 32 45 #define EX_DAR 40 46 #define EX_DSISR 48 47 #define EX_CCR 52 48 #define EX_CFAR 56 49 #define EX_PPR 64 50 #if defined(CONFIG_RELOCATABLE) 51 #define EX_CTR 72 52 #define EX_SIZE 10 /* size in u64 units */ 53 #else 54 #define EX_SIZE 9 /* size in u64 units */ 55 #endif 56 57 /* 58 * maximum recursive depth of MCE exceptions 59 */ 60 #define MAX_MCE_DEPTH 4 61 62 /* 63 * EX_LR is only used in EXSLB and where it does not overlap with EX_DAR 64 * EX_CCR similarly with DSISR, but being 4 byte registers there is a hole 65 * in the save area so it's not necessary to overlap them. Could be used 66 * for future savings though if another 4 byte register was to be saved. 67 */ 68 #define EX_LR EX_DAR 69 70 /* 71 * EX_R3 is only used by the bad_stack handler. bad_stack reloads and 72 * saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap 73 * with EX_DAR. 74 */ 75 #define EX_R3 EX_DAR 76 77 #define STF_ENTRY_BARRIER_SLOT \ 78 STF_ENTRY_BARRIER_FIXUP_SECTION; \ 79 nop; \ 80 nop; \ 81 nop 82 83 #define STF_EXIT_BARRIER_SLOT \ 84 STF_EXIT_BARRIER_FIXUP_SECTION; \ 85 nop; \ 86 nop; \ 87 nop; \ 88 nop; \ 89 nop; \ 90 nop 91 92 /* 93 * r10 must be free to use, r13 must be paca 94 */ 95 #define INTERRUPT_TO_KERNEL \ 96 STF_ENTRY_BARRIER_SLOT 97 98 /* 99 * Macros for annotating the expected destination of (h)rfid 100 * 101 * The nop instructions allow us to insert one or more instructions to flush the 102 * L1-D cache when returning to userspace or a guest. 103 */ 104 #define RFI_FLUSH_SLOT \ 105 RFI_FLUSH_FIXUP_SECTION; \ 106 nop; \ 107 nop; \ 108 nop 109 110 #define RFI_TO_KERNEL \ 111 rfid 112 113 #define RFI_TO_USER \ 114 STF_EXIT_BARRIER_SLOT; \ 115 RFI_FLUSH_SLOT; \ 116 rfid; \ 117 b rfi_flush_fallback 118 119 #define RFI_TO_USER_OR_KERNEL \ 120 STF_EXIT_BARRIER_SLOT; \ 121 RFI_FLUSH_SLOT; \ 122 rfid; \ 123 b rfi_flush_fallback 124 125 #define RFI_TO_GUEST \ 126 STF_EXIT_BARRIER_SLOT; \ 127 RFI_FLUSH_SLOT; \ 128 rfid; \ 129 b rfi_flush_fallback 130 131 #define HRFI_TO_KERNEL \ 132 hrfid 133 134 #define HRFI_TO_USER \ 135 STF_EXIT_BARRIER_SLOT; \ 136 RFI_FLUSH_SLOT; \ 137 hrfid; \ 138 b hrfi_flush_fallback 139 140 #define HRFI_TO_USER_OR_KERNEL \ 141 STF_EXIT_BARRIER_SLOT; \ 142 RFI_FLUSH_SLOT; \ 143 hrfid; \ 144 b hrfi_flush_fallback 145 146 #define HRFI_TO_GUEST \ 147 STF_EXIT_BARRIER_SLOT; \ 148 RFI_FLUSH_SLOT; \ 149 hrfid; \ 150 b hrfi_flush_fallback 151 152 #define HRFI_TO_UNKNOWN \ 153 STF_EXIT_BARRIER_SLOT; \ 154 RFI_FLUSH_SLOT; \ 155 hrfid; \ 156 b hrfi_flush_fallback 157 158 #ifdef CONFIG_RELOCATABLE 159 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 160 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 161 LOAD_HANDLER(r12,label); \ 162 mtctr r12; \ 163 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 164 li r10,MSR_RI; \ 165 mtmsrd r10,1; /* Set RI (EE=0) */ \ 166 bctr; 167 #else 168 /* If not relocatable, we can jump directly -- and save messing with LR */ 169 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 170 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 171 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 172 li r10,MSR_RI; \ 173 mtmsrd r10,1; /* Set RI (EE=0) */ \ 174 b label; 175 #endif 176 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 177 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 178 179 /* 180 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 181 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which 182 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 183 */ 184 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 185 EXCEPTION_PROLOG_0(area); \ 186 EXCEPTION_PROLOG_1(area, extra, vec); \ 187 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 188 189 /* 190 * We're short on space and time in the exception prolog, so we can't 191 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label. 192 * Instead we get the base of the kernel from paca->kernelbase and or in the low 193 * part of label. This requires that the label be within 64KB of kernelbase, and 194 * that kernelbase be 64K aligned. 195 */ 196 #define LOAD_HANDLER(reg, label) \ 197 ld reg,PACAKBASE(r13); /* get high part of &label */ \ 198 ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); 199 200 #define __LOAD_HANDLER(reg, label) \ 201 ld reg,PACAKBASE(r13); \ 202 ori reg,reg,(ABS_ADDR(label))@l; 203 204 /* 205 * Branches from unrelocated code (e.g., interrupts) to labels outside 206 * head-y require >64K offsets. 207 */ 208 #define __LOAD_FAR_HANDLER(reg, label) \ 209 ld reg,PACAKBASE(r13); \ 210 ori reg,reg,(ABS_ADDR(label))@l; \ 211 addis reg,reg,(ABS_ADDR(label))@h; 212 213 /* Exception register prefixes */ 214 #define EXC_HV H 215 #define EXC_STD 216 217 #if defined(CONFIG_RELOCATABLE) 218 /* 219 * If we support interrupts with relocation on AND we're a relocatable kernel, 220 * we need to use CTR to get to the 2nd level handler. So, save/restore it 221 * when required. 222 */ 223 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13) 224 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13) 225 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg 226 #else 227 /* ...else CTR is unused and in register. */ 228 #define SAVE_CTR(reg, area) 229 #define GET_CTR(reg, area) mfctr reg 230 #define RESTORE_CTR(reg, area) 231 #endif 232 233 /* 234 * PPR save/restore macros used in exceptions_64s.S 235 * Used for P7 or later processors 236 */ 237 #define SAVE_PPR(area, ra, rb) \ 238 BEGIN_FTR_SECTION_NESTED(940) \ 239 ld ra,PACACURRENT(r13); \ 240 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ 241 std rb,TASKTHREADPPR(ra); \ 242 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) 243 244 #define RESTORE_PPR_PACA(area, ra) \ 245 BEGIN_FTR_SECTION_NESTED(941) \ 246 ld ra,area+EX_PPR(r13); \ 247 mtspr SPRN_PPR,ra; \ 248 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) 249 250 /* 251 * Get an SPR into a register if the CPU has the given feature 252 */ 253 #define OPT_GET_SPR(ra, spr, ftr) \ 254 BEGIN_FTR_SECTION_NESTED(943) \ 255 mfspr ra,spr; \ 256 END_FTR_SECTION_NESTED(ftr,ftr,943) 257 258 /* 259 * Set an SPR from a register if the CPU has the given feature 260 */ 261 #define OPT_SET_SPR(ra, spr, ftr) \ 262 BEGIN_FTR_SECTION_NESTED(943) \ 263 mtspr spr,ra; \ 264 END_FTR_SECTION_NESTED(ftr,ftr,943) 265 266 /* 267 * Save a register to the PACA if the CPU has the given feature 268 */ 269 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \ 270 BEGIN_FTR_SECTION_NESTED(943) \ 271 std ra,offset(r13); \ 272 END_FTR_SECTION_NESTED(ftr,ftr,943) 273 274 #define EXCEPTION_PROLOG_0(area) \ 275 GET_PACA(r13); \ 276 std r9,area+EX_R9(r13); /* save r9 */ \ 277 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ 278 HMT_MEDIUM; \ 279 std r10,area+EX_R10(r13); /* save r10 - r12 */ \ 280 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) 281 282 #define __EXCEPTION_PROLOG_1_PRE(area) \ 283 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ 284 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ 285 INTERRUPT_TO_KERNEL; \ 286 SAVE_CTR(r10, area); \ 287 mfcr r9; 288 289 #define __EXCEPTION_PROLOG_1_POST(area) \ 290 std r11,area+EX_R11(r13); \ 291 std r12,area+EX_R12(r13); \ 292 GET_SCRATCH0(r10); \ 293 std r10,area+EX_R13(r13) 294 295 /* 296 * This version of the EXCEPTION_PROLOG_1 will carry 297 * addition parameter called "bitmask" to support 298 * checking of the interrupt maskable level in the SOFTEN_TEST. 299 * Intended to be used in MASKABLE_EXCPETION_* macros. 300 */ 301 #define MASKABLE_EXCEPTION_PROLOG_1(area, extra, vec, bitmask) \ 302 __EXCEPTION_PROLOG_1_PRE(area); \ 303 extra(vec, bitmask); \ 304 __EXCEPTION_PROLOG_1_POST(area); 305 306 /* 307 * This version of the EXCEPTION_PROLOG_1 is intended 308 * to be used in STD_EXCEPTION* macros 309 */ 310 #define _EXCEPTION_PROLOG_1(area, extra, vec) \ 311 __EXCEPTION_PROLOG_1_PRE(area); \ 312 extra(vec); \ 313 __EXCEPTION_PROLOG_1_POST(area); 314 315 #define EXCEPTION_PROLOG_1(area, extra, vec) \ 316 _EXCEPTION_PROLOG_1(area, extra, vec) 317 318 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \ 319 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 320 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 321 LOAD_HANDLER(r12,label) \ 322 mtspr SPRN_##h##SRR0,r12; \ 323 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 324 mtspr SPRN_##h##SRR1,r10; \ 325 h##RFI_TO_KERNEL; \ 326 b . /* prevent speculative execution */ 327 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \ 328 __EXCEPTION_PROLOG_PSERIES_1(label, h) 329 330 /* _NORI variant keeps MSR_RI clear */ 331 #define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 332 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \ 333 xori r10,r10,MSR_RI; /* Clear MSR_RI */ \ 334 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 335 LOAD_HANDLER(r12,label) \ 336 mtspr SPRN_##h##SRR0,r12; \ 337 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 338 mtspr SPRN_##h##SRR1,r10; \ 339 h##RFI_TO_KERNEL; \ 340 b . /* prevent speculative execution */ 341 342 #define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \ 343 __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) 344 345 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 346 EXCEPTION_PROLOG_0(area); \ 347 EXCEPTION_PROLOG_1(area, extra, vec); \ 348 EXCEPTION_PROLOG_PSERIES_1(label, h); 349 350 #define __KVMTEST(h, n) \ 351 lbz r10,HSTATE_IN_GUEST(r13); \ 352 cmpwi r10,0; \ 353 bne do_kvm_##h##n 354 355 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 356 /* 357 * If hv is possible, interrupts come into to the hv version 358 * of the kvmppc_interrupt code, which then jumps to the PR handler, 359 * kvmppc_interrupt_pr, if the guest is a PR guest. 360 */ 361 #define kvmppc_interrupt kvmppc_interrupt_hv 362 #else 363 #define kvmppc_interrupt kvmppc_interrupt_pr 364 #endif 365 366 /* 367 * Branch to label using its 0xC000 address. This results in instruction 368 * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned 369 * on using mtmsr rather than rfid. 370 * 371 * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than 372 * load KBASE for a slight optimisation. 373 */ 374 #define BRANCH_TO_C000(reg, label) \ 375 __LOAD_HANDLER(reg, label); \ 376 mtctr reg; \ 377 bctr 378 379 #ifdef CONFIG_RELOCATABLE 380 #define BRANCH_TO_COMMON(reg, label) \ 381 __LOAD_HANDLER(reg, label); \ 382 mtctr reg; \ 383 bctr 384 385 #define BRANCH_LINK_TO_FAR(label) \ 386 __LOAD_FAR_HANDLER(r12, label); \ 387 mtctr r12; \ 388 bctrl 389 390 /* 391 * KVM requires __LOAD_FAR_HANDLER. 392 * 393 * __BRANCH_TO_KVM_EXIT branches are also a special case because they 394 * explicitly use r9 then reload it from PACA before branching. Hence 395 * the double-underscore. 396 */ 397 #define __BRANCH_TO_KVM_EXIT(area, label) \ 398 mfctr r9; \ 399 std r9,HSTATE_SCRATCH1(r13); \ 400 __LOAD_FAR_HANDLER(r9, label); \ 401 mtctr r9; \ 402 ld r9,area+EX_R9(r13); \ 403 bctr 404 405 #else 406 #define BRANCH_TO_COMMON(reg, label) \ 407 b label 408 409 #define BRANCH_LINK_TO_FAR(label) \ 410 bl label 411 412 #define __BRANCH_TO_KVM_EXIT(area, label) \ 413 ld r9,area+EX_R9(r13); \ 414 b label 415 416 #endif 417 418 /* Do not enable RI */ 419 #define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \ 420 EXCEPTION_PROLOG_0(area); \ 421 EXCEPTION_PROLOG_1(area, extra, vec); \ 422 EXCEPTION_PROLOG_PSERIES_1_NORI(label, h); 423 424 425 #define __KVM_HANDLER(area, h, n) \ 426 BEGIN_FTR_SECTION_NESTED(947) \ 427 ld r10,area+EX_CFAR(r13); \ 428 std r10,HSTATE_CFAR(r13); \ 429 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ 430 BEGIN_FTR_SECTION_NESTED(948) \ 431 ld r10,area+EX_PPR(r13); \ 432 std r10,HSTATE_PPR(r13); \ 433 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 434 ld r10,area+EX_R10(r13); \ 435 std r12,HSTATE_SCRATCH0(r13); \ 436 sldi r12,r9,32; \ 437 ori r12,r12,(n); \ 438 /* This reloads r9 before branching to kvmppc_interrupt */ \ 439 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt) 440 441 #define __KVM_HANDLER_SKIP(area, h, n) \ 442 cmpwi r10,KVM_GUEST_MODE_SKIP; \ 443 beq 89f; \ 444 BEGIN_FTR_SECTION_NESTED(948) \ 445 ld r10,area+EX_PPR(r13); \ 446 std r10,HSTATE_PPR(r13); \ 447 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \ 448 ld r10,area+EX_R10(r13); \ 449 std r12,HSTATE_SCRATCH0(r13); \ 450 sldi r12,r9,32; \ 451 ori r12,r12,(n); \ 452 /* This reloads r9 before branching to kvmppc_interrupt */ \ 453 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \ 454 89: mtocrf 0x80,r9; \ 455 ld r9,area+EX_R9(r13); \ 456 ld r10,area+EX_R10(r13); \ 457 b kvmppc_skip_##h##interrupt 458 459 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 460 #define KVMTEST(h, n) __KVMTEST(h, n) 461 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n) 462 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n) 463 464 #else 465 #define KVMTEST(h, n) 466 #define KVM_HANDLER(area, h, n) 467 #define KVM_HANDLER_SKIP(area, h, n) 468 #endif 469 470 #define NOTEST(n) 471 472 #define EXCEPTION_PROLOG_COMMON_1() \ 473 std r9,_CCR(r1); /* save CR in stackframe */ \ 474 std r11,_NIP(r1); /* save SRR0 in stackframe */ \ 475 std r12,_MSR(r1); /* save SRR1 in stackframe */ \ 476 std r10,0(r1); /* make stack chain pointer */ \ 477 std r0,GPR0(r1); /* save r0 in stackframe */ \ 478 std r10,GPR1(r1); /* save r1 in stackframe */ \ 479 480 481 /* 482 * The common exception prolog is used for all except a few exceptions 483 * such as a segment miss on a kernel address. We have to be prepared 484 * to take another exception from the point where we first touch the 485 * kernel stack onwards. 486 * 487 * On entry r13 points to the paca, r9-r13 are saved in the paca, 488 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and 489 * SRR1, and relocation is on. 490 */ 491 #define EXCEPTION_PROLOG_COMMON(n, area) \ 492 andi. r10,r12,MSR_PR; /* See if coming from user */ \ 493 mr r10,r1; /* Save r1 */ \ 494 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ 495 beq- 1f; \ 496 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ 497 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \ 498 blt+ cr1,3f; /* abort if it is */ \ 499 li r1,(n); /* will be reloaded later */ \ 500 sth r1,PACA_TRAP_SAVE(r13); \ 501 std r3,area+EX_R3(r13); \ 502 addi r3,r13,area; /* r3 -> where regs are saved*/ \ 503 RESTORE_CTR(r1, area); \ 504 b bad_stack; \ 505 3: EXCEPTION_PROLOG_COMMON_1(); \ 506 beq 4f; /* if from kernel mode */ \ 507 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \ 508 SAVE_PPR(area, r9, r10); \ 509 4: EXCEPTION_PROLOG_COMMON_2(area) \ 510 EXCEPTION_PROLOG_COMMON_3(n) \ 511 ACCOUNT_STOLEN_TIME 512 513 /* Save original regs values from save area to stack frame. */ 514 #define EXCEPTION_PROLOG_COMMON_2(area) \ 515 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 516 ld r10,area+EX_R10(r13); \ 517 std r9,GPR9(r1); \ 518 std r10,GPR10(r1); \ 519 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ 520 ld r10,area+EX_R12(r13); \ 521 ld r11,area+EX_R13(r13); \ 522 std r9,GPR11(r1); \ 523 std r10,GPR12(r1); \ 524 std r11,GPR13(r1); \ 525 BEGIN_FTR_SECTION_NESTED(66); \ 526 ld r10,area+EX_CFAR(r13); \ 527 std r10,ORIG_GPR3(r1); \ 528 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 529 GET_CTR(r10, area); \ 530 std r10,_CTR(r1); 531 532 #define EXCEPTION_PROLOG_COMMON_3(n) \ 533 std r2,GPR2(r1); /* save r2 in stackframe */ \ 534 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 535 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 536 mflr r9; /* Get LR, later save to stack */ \ 537 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ 538 std r9,_LINK(r1); \ 539 lbz r10,PACAIRQSOFTMASK(r13); \ 540 mfspr r11,SPRN_XER; /* save XER in stackframe */ \ 541 std r10,SOFTE(r1); \ 542 std r11,_XER(r1); \ 543 li r9,(n)+1; \ 544 std r9,_TRAP(r1); /* set trap number */ \ 545 li r10,0; \ 546 ld r11,exception_marker@toc(r2); \ 547 std r10,RESULT(r1); /* clear regs->result */ \ 548 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ 549 550 /* 551 * Exception vectors. 552 */ 553 #define STD_EXCEPTION_PSERIES(vec, label) \ 554 SET_SCRATCH0(r13); /* save r13 */ \ 555 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 556 EXC_STD, KVMTEST_PR, vec); \ 557 558 /* Version of above for when we have to branch out-of-line */ 559 #define __OOL_EXCEPTION(vec, label, hdlr) \ 560 SET_SCRATCH0(r13) \ 561 EXCEPTION_PROLOG_0(PACA_EXGEN) \ 562 b hdlr; 563 564 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \ 565 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ 566 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 567 568 #define STD_EXCEPTION_HV(loc, vec, label) \ 569 SET_SCRATCH0(r13); /* save r13 */ \ 570 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \ 571 EXC_HV, KVMTEST_HV, vec); 572 573 #define STD_EXCEPTION_HV_OOL(vec, label) \ 574 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 575 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 576 577 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 578 /* No guest interrupts come through here */ \ 579 SET_SCRATCH0(r13); /* save r13 */ \ 580 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec); 581 582 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \ 583 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \ 584 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD) 585 586 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 587 SET_SCRATCH0(r13); /* save r13 */ \ 588 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \ 589 EXC_HV, KVMTEST_HV, vec); 590 591 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \ 592 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \ 593 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 594 595 /* This associate vector numbers with bits in paca->irq_happened */ 596 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE 597 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 598 #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC 599 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL 600 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL 601 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI 602 #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE 603 #define SOFTEN_VALUE_0xf00 PACA_IRQ_PMI 604 605 #define __SOFTEN_TEST(h, vec, bitmask) \ 606 lbz r10,PACAIRQSOFTMASK(r13); \ 607 andi. r10,r10,bitmask; \ 608 li r10,SOFTEN_VALUE_##vec; \ 609 bne masked_##h##interrupt 610 611 #define _SOFTEN_TEST(h, vec, bitmask) __SOFTEN_TEST(h, vec, bitmask) 612 613 #define SOFTEN_TEST_PR(vec, bitmask) \ 614 KVMTEST(EXC_STD, vec); \ 615 _SOFTEN_TEST(EXC_STD, vec, bitmask) 616 617 #define SOFTEN_TEST_HV(vec, bitmask) \ 618 KVMTEST(EXC_HV, vec); \ 619 _SOFTEN_TEST(EXC_HV, vec, bitmask) 620 621 #define KVMTEST_PR(vec) \ 622 KVMTEST(EXC_STD, vec) 623 624 #define KVMTEST_HV(vec) \ 625 KVMTEST(EXC_HV, vec) 626 627 #define SOFTEN_NOTEST_PR(vec, bitmask) _SOFTEN_TEST(EXC_STD, vec, bitmask) 628 #define SOFTEN_NOTEST_HV(vec, bitmask) _SOFTEN_TEST(EXC_HV, vec, bitmask) 629 630 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) \ 631 SET_SCRATCH0(r13); /* save r13 */ \ 632 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 633 MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \ 634 EXCEPTION_PROLOG_PSERIES_1(label, h); 635 636 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) \ 637 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) 638 639 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label, bitmask) \ 640 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 641 EXC_STD, SOFTEN_TEST_PR, bitmask) 642 643 #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label, bitmask) \ 644 MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec, bitmask);\ 645 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD) 646 647 #define MASKABLE_EXCEPTION_HV(loc, vec, label, bitmask) \ 648 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 649 EXC_HV, SOFTEN_TEST_HV, bitmask) 650 651 #define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask) \ 652 MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\ 653 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV) 654 655 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) \ 656 SET_SCRATCH0(r13); /* save r13 */ \ 657 EXCEPTION_PROLOG_0(PACA_EXGEN); \ 658 MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \ 659 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 660 661 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask)\ 662 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) 663 664 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label, bitmask) \ 665 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 666 EXC_STD, SOFTEN_NOTEST_PR, bitmask) 667 668 #define MASKABLE_RELON_EXCEPTION_PSERIES_OOL(vec, label, bitmask) \ 669 MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec, bitmask);\ 670 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD); 671 672 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label, bitmask) \ 673 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 674 EXC_HV, SOFTEN_TEST_HV, bitmask) 675 676 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask) \ 677 MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\ 678 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV) 679 680 /* 681 * Our exception common code can be passed various "additions" 682 * to specify the behaviour of interrupts, whether to kick the 683 * runlatch, etc... 684 */ 685 686 /* 687 * This addition reconciles our actual IRQ state with the various software 688 * flags that track it. This may call C code. 689 */ 690 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11) 691 692 #define ADD_NVGPRS \ 693 bl save_nvgprs 694 695 #define RUNLATCH_ON \ 696 BEGIN_FTR_SECTION \ 697 CURRENT_THREAD_INFO(r3, r1); \ 698 ld r4,TI_LOCAL_FLAGS(r3); \ 699 andi. r0,r4,_TLF_RUNLATCH; \ 700 beql ppc64_runlatch_on_trampoline; \ 701 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) 702 703 #define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \ 704 EXCEPTION_PROLOG_COMMON(trap, area); \ 705 /* Volatile regs are potentially clobbered here */ \ 706 additions; \ 707 addi r3,r1,STACK_FRAME_OVERHEAD; \ 708 bl hdlr; \ 709 b ret 710 711 /* 712 * Exception where stack is already set in r1, r1 is saved in r10, and it 713 * continues rather than returns. 714 */ 715 #define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \ 716 EXCEPTION_PROLOG_COMMON_1(); \ 717 EXCEPTION_PROLOG_COMMON_2(area); \ 718 EXCEPTION_PROLOG_COMMON_3(trap); \ 719 /* Volatile regs are potentially clobbered here */ \ 720 additions; \ 721 addi r3,r1,STACK_FRAME_OVERHEAD; \ 722 bl hdlr 723 724 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \ 725 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 726 ret_from_except, ADD_NVGPRS;ADD_RECONCILE) 727 728 /* 729 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur 730 * in the idle task and therefore need the special idle handling 731 * (finish nap and runlatch) 732 */ 733 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \ 734 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \ 735 ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON) 736 737 /* 738 * When the idle code in power4_idle puts the CPU into NAP mode, 739 * it has to do so in a loop, and relies on the external interrupt 740 * and decrementer interrupt entry code to get it out of the loop. 741 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags 742 * to signal that it is in the loop and needs help to get out. 743 */ 744 #ifdef CONFIG_PPC_970_NAP 745 #define FINISH_NAP \ 746 BEGIN_FTR_SECTION \ 747 CURRENT_THREAD_INFO(r11, r1); \ 748 ld r9,TI_LOCAL_FLAGS(r11); \ 749 andi. r10,r9,_TLF_NAPPING; \ 750 bnel power4_fixup_nap; \ 751 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 752 #else 753 #define FINISH_NAP 754 #endif 755 756 #endif /* _ASM_POWERPC_EXCEPTION_H */ 757