113363ab9SBenjamin Herrenschmidt /*
213363ab9SBenjamin Herrenschmidt  *  Definitions for use by exception code on Book3-E
313363ab9SBenjamin Herrenschmidt  *
413363ab9SBenjamin Herrenschmidt  *  Copyright (C) 2008 Ben. Herrenschmidt (benh@kernel.crashing.org), IBM Corp.
513363ab9SBenjamin Herrenschmidt  *
613363ab9SBenjamin Herrenschmidt  *  This program is free software; you can redistribute it and/or
713363ab9SBenjamin Herrenschmidt  *  modify it under the terms of the GNU General Public License
813363ab9SBenjamin Herrenschmidt  *  as published by the Free Software Foundation; either version
913363ab9SBenjamin Herrenschmidt  *  2 of the License, or (at your option) any later version.
1013363ab9SBenjamin Herrenschmidt  */
1113363ab9SBenjamin Herrenschmidt #ifndef _ASM_POWERPC_EXCEPTION_64E_H
1213363ab9SBenjamin Herrenschmidt #define _ASM_POWERPC_EXCEPTION_64E_H
1313363ab9SBenjamin Herrenschmidt 
1413363ab9SBenjamin Herrenschmidt /*
1513363ab9SBenjamin Herrenschmidt  * SPRGs usage an other considerations...
1613363ab9SBenjamin Herrenschmidt  *
1713363ab9SBenjamin Herrenschmidt  * Since TLB miss and other standard exceptions can be interrupted by
1813363ab9SBenjamin Herrenschmidt  * critical exceptions which can themselves be interrupted by machine
1913363ab9SBenjamin Herrenschmidt  * checks, and since the two later can themselves cause a TLB miss when
2013363ab9SBenjamin Herrenschmidt  * hitting the linear mapping for the kernel stacks, we need to be a bit
2113363ab9SBenjamin Herrenschmidt  * creative on how we use SPRGs.
2213363ab9SBenjamin Herrenschmidt  *
2313363ab9SBenjamin Herrenschmidt  * The base idea is that we have one SRPG reserved for critical and one
2413363ab9SBenjamin Herrenschmidt  * for machine check interrupts. Those are used to save a GPR that can
2513363ab9SBenjamin Herrenschmidt  * then be used to get the PACA, and store as much context as we need
2613363ab9SBenjamin Herrenschmidt  * to save in there. That includes saving the SPRGs used by the TLB miss
2713363ab9SBenjamin Herrenschmidt  * handler for linear mapping misses and the associated SRR0/1 due to
2813363ab9SBenjamin Herrenschmidt  * the above re-entrancy issue.
2913363ab9SBenjamin Herrenschmidt  *
3013363ab9SBenjamin Herrenschmidt  * So here's the current usage pattern. It's done regardless of which
3113363ab9SBenjamin Herrenschmidt  * SPRGs are user-readable though, thus we might have to change some of
3213363ab9SBenjamin Herrenschmidt  * this later. In order to do that more easily, we use special constants
3313363ab9SBenjamin Herrenschmidt  * for naming them
3413363ab9SBenjamin Herrenschmidt  *
3513363ab9SBenjamin Herrenschmidt  * WARNING: Some of these SPRGs are user readable. We need to do something
3613363ab9SBenjamin Herrenschmidt  * about it as some point by making sure they can't be used to leak kernel
3713363ab9SBenjamin Herrenschmidt  * critical data
3813363ab9SBenjamin Herrenschmidt  */
3913363ab9SBenjamin Herrenschmidt 
405473eb1cSMihai Caraman #define PACA_EXGDBELL PACA_EXGEN
4113363ab9SBenjamin Herrenschmidt 
4213363ab9SBenjamin Herrenschmidt /* We are out of SPRGs so we save some things in the PACA. The normal
4313363ab9SBenjamin Herrenschmidt  * exception frame is smaller than the CRIT or MC one though
4413363ab9SBenjamin Herrenschmidt  */
4513363ab9SBenjamin Herrenschmidt #define EX_R1		(0 * 8)
4613363ab9SBenjamin Herrenschmidt #define EX_CR		(1 * 8)
4713363ab9SBenjamin Herrenschmidt #define EX_R10		(2 * 8)
4813363ab9SBenjamin Herrenschmidt #define EX_R11		(3 * 8)
499d378dfaSScott Wood #define EX_R14		(4 * 8)
509d378dfaSScott Wood #define EX_R15		(5 * 8)
5113363ab9SBenjamin Herrenschmidt 
52f67f4ef5SScott Wood /*
53f67f4ef5SScott Wood  * The TLB miss exception uses different slots.
54f67f4ef5SScott Wood  *
55f67f4ef5SScott Wood  * The bolted variant uses only the first six fields,
56f67f4ef5SScott Wood  * which in combination with pgd and kernel_pgd fits in
57f67f4ef5SScott Wood  * one 64-byte cache line.
58f67f4ef5SScott Wood  */
5913363ab9SBenjamin Herrenschmidt 
6013363ab9SBenjamin Herrenschmidt #define EX_TLB_R10	( 0 * 8)
6113363ab9SBenjamin Herrenschmidt #define EX_TLB_R11	( 1 * 8)
62f67f4ef5SScott Wood #define EX_TLB_R14	( 2 * 8)
63f67f4ef5SScott Wood #define EX_TLB_R15	( 3 * 8)
64f67f4ef5SScott Wood #define EX_TLB_R16	( 4 * 8)
65f67f4ef5SScott Wood #define EX_TLB_CR	( 5 * 8)
66f67f4ef5SScott Wood #define EX_TLB_R12	( 6 * 8)
67f67f4ef5SScott Wood #define EX_TLB_R13	( 7 * 8)
6813363ab9SBenjamin Herrenschmidt #define EX_TLB_DEAR	( 8 * 8) /* Level 0 and 2 only */
6913363ab9SBenjamin Herrenschmidt #define EX_TLB_ESR	( 9 * 8) /* Level 0 and 2 only */
7013363ab9SBenjamin Herrenschmidt #define EX_TLB_SRR0	(10 * 8)
7113363ab9SBenjamin Herrenschmidt #define EX_TLB_SRR1	(11 * 8)
72e1f580e8SKevin Hao #define EX_TLB_R7	(12 * 8)
7313363ab9SBenjamin Herrenschmidt #ifdef CONFIG_BOOK3E_MMU_TLB_STATS
74e1f580e8SKevin Hao #define EX_TLB_R8	(13 * 8)
75e1f580e8SKevin Hao #define EX_TLB_R9	(14 * 8)
76e1f580e8SKevin Hao #define EX_TLB_LR	(15 * 8)
77e1f580e8SKevin Hao #define EX_TLB_SIZE	(16 * 8)
7813363ab9SBenjamin Herrenschmidt #else
79e1f580e8SKevin Hao #define EX_TLB_SIZE	(13 * 8)
8013363ab9SBenjamin Herrenschmidt #endif
8113363ab9SBenjamin Herrenschmidt 
8213363ab9SBenjamin Herrenschmidt #define	START_EXCEPTION(label)						\
8313363ab9SBenjamin Herrenschmidt 	.globl exc_##label##_book3e;					\
8413363ab9SBenjamin Herrenschmidt exc_##label##_book3e:
8513363ab9SBenjamin Herrenschmidt 
8613363ab9SBenjamin Herrenschmidt /* TLB miss exception prolog
8713363ab9SBenjamin Herrenschmidt  *
8813363ab9SBenjamin Herrenschmidt  * This prolog handles re-entrancy (up to 3 levels supported in the PACA
8913363ab9SBenjamin Herrenschmidt  * though we currently don't test for overflow). It provides you with a
9013363ab9SBenjamin Herrenschmidt  * re-entrancy safe working space of r10...r16 and CR with r12 being used
9113363ab9SBenjamin Herrenschmidt  * as the exception area pointer in the PACA for that level of re-entrancy
9213363ab9SBenjamin Herrenschmidt  * and r13 containing the PACA pointer.
9313363ab9SBenjamin Herrenschmidt  *
9413363ab9SBenjamin Herrenschmidt  * SRR0 and SRR1 are saved, but DEAR and ESR are not, since they don't apply
9513363ab9SBenjamin Herrenschmidt  * as-is for instruction exceptions. It's up to the actual exception code
9613363ab9SBenjamin Herrenschmidt  * to save them as well if required.
9713363ab9SBenjamin Herrenschmidt  */
9813363ab9SBenjamin Herrenschmidt #define TLB_MISS_PROLOG							    \
9913363ab9SBenjamin Herrenschmidt 	mtspr	SPRN_SPRG_TLB_SCRATCH,r12;				    \
10013363ab9SBenjamin Herrenschmidt 	mfspr	r12,SPRN_SPRG_TLB_EXFRAME;				    \
10113363ab9SBenjamin Herrenschmidt 	std	r10,EX_TLB_R10(r12);					    \
10213363ab9SBenjamin Herrenschmidt 	mfcr	r10;							    \
10313363ab9SBenjamin Herrenschmidt 	std	r11,EX_TLB_R11(r12);					    \
10413363ab9SBenjamin Herrenschmidt 	mfspr	r11,SPRN_SPRG_TLB_SCRATCH;				    \
10513363ab9SBenjamin Herrenschmidt 	std	r13,EX_TLB_R13(r12);					    \
10613363ab9SBenjamin Herrenschmidt 	mfspr	r13,SPRN_SPRG_PACA;					    \
10713363ab9SBenjamin Herrenschmidt 	std	r14,EX_TLB_R14(r12);					    \
10813363ab9SBenjamin Herrenschmidt 	addi	r14,r12,EX_TLB_SIZE;					    \
10913363ab9SBenjamin Herrenschmidt 	std	r15,EX_TLB_R15(r12);					    \
11013363ab9SBenjamin Herrenschmidt 	mfspr	r15,SPRN_SRR1;						    \
11113363ab9SBenjamin Herrenschmidt 	std	r16,EX_TLB_R16(r12);					    \
11213363ab9SBenjamin Herrenschmidt 	mfspr	r16,SPRN_SRR0;						    \
11313363ab9SBenjamin Herrenschmidt 	std	r10,EX_TLB_CR(r12);					    \
11413363ab9SBenjamin Herrenschmidt 	std	r11,EX_TLB_R12(r12);					    \
11513363ab9SBenjamin Herrenschmidt 	mtspr	SPRN_SPRG_TLB_EXFRAME,r14;				    \
11613363ab9SBenjamin Herrenschmidt 	std	r15,EX_TLB_SRR1(r12);					    \
11713363ab9SBenjamin Herrenschmidt 	std	r16,EX_TLB_SRR0(r12);					    \
11813363ab9SBenjamin Herrenschmidt 	TLB_MISS_PROLOG_STATS
11913363ab9SBenjamin Herrenschmidt 
12013363ab9SBenjamin Herrenschmidt /* And these are the matching epilogs that restores things
12113363ab9SBenjamin Herrenschmidt  *
12213363ab9SBenjamin Herrenschmidt  * There are 3 epilogs:
12313363ab9SBenjamin Herrenschmidt  *
12413363ab9SBenjamin Herrenschmidt  * - SUCCESS       : Unwinds one level
12513363ab9SBenjamin Herrenschmidt  * - ERROR         : restore from level 0 and reset
12613363ab9SBenjamin Herrenschmidt  * - ERROR_SPECIAL : restore from current level and reset
12713363ab9SBenjamin Herrenschmidt  *
12813363ab9SBenjamin Herrenschmidt  * Normal errors use ERROR, that is, they restore the initial fault context
12913363ab9SBenjamin Herrenschmidt  * and trigger a fault. However, there is a special case for linear mapping
13013363ab9SBenjamin Herrenschmidt  * errors. Those should basically never happen, but if they do happen, we
13113363ab9SBenjamin Herrenschmidt  * want the error to point out the context that did that linear mapping
13213363ab9SBenjamin Herrenschmidt  * fault, not the initial level 0 (basically, we got a bogus PGF or something
13313363ab9SBenjamin Herrenschmidt  * like that). For userland errors on the linear mapping, there is no
13413363ab9SBenjamin Herrenschmidt  * difference since those are always level 0 anyway
13513363ab9SBenjamin Herrenschmidt  */
13613363ab9SBenjamin Herrenschmidt 
13713363ab9SBenjamin Herrenschmidt #define TLB_MISS_RESTORE(freg)						    \
13813363ab9SBenjamin Herrenschmidt 	ld	r14,EX_TLB_CR(r12);					    \
13913363ab9SBenjamin Herrenschmidt 	ld	r10,EX_TLB_R10(r12);					    \
14013363ab9SBenjamin Herrenschmidt 	ld	r15,EX_TLB_SRR0(r12);					    \
14113363ab9SBenjamin Herrenschmidt 	ld	r16,EX_TLB_SRR1(r12);					    \
14213363ab9SBenjamin Herrenschmidt 	mtspr	SPRN_SPRG_TLB_EXFRAME,freg;				    \
14313363ab9SBenjamin Herrenschmidt 	ld	r11,EX_TLB_R11(r12);					    \
14413363ab9SBenjamin Herrenschmidt 	mtcr	r14;							    \
14513363ab9SBenjamin Herrenschmidt 	ld	r13,EX_TLB_R13(r12);					    \
14613363ab9SBenjamin Herrenschmidt 	ld	r14,EX_TLB_R14(r12);					    \
14713363ab9SBenjamin Herrenschmidt 	mtspr	SPRN_SRR0,r15;						    \
14813363ab9SBenjamin Herrenschmidt 	ld	r15,EX_TLB_R15(r12);					    \
14913363ab9SBenjamin Herrenschmidt 	mtspr	SPRN_SRR1,r16;						    \
15013363ab9SBenjamin Herrenschmidt 	TLB_MISS_RESTORE_STATS						    \
15113363ab9SBenjamin Herrenschmidt 	ld	r16,EX_TLB_R16(r12);					    \
15213363ab9SBenjamin Herrenschmidt 	ld	r12,EX_TLB_R12(r12);					    \
15313363ab9SBenjamin Herrenschmidt 
15413363ab9SBenjamin Herrenschmidt #define TLB_MISS_EPILOG_SUCCESS						    \
15513363ab9SBenjamin Herrenschmidt 	TLB_MISS_RESTORE(r12)
15613363ab9SBenjamin Herrenschmidt 
15713363ab9SBenjamin Herrenschmidt #define TLB_MISS_EPILOG_ERROR						    \
15813363ab9SBenjamin Herrenschmidt 	addi	r12,r13,PACA_EXTLB;					    \
15913363ab9SBenjamin Herrenschmidt 	TLB_MISS_RESTORE(r12)
16013363ab9SBenjamin Herrenschmidt 
16113363ab9SBenjamin Herrenschmidt #define TLB_MISS_EPILOG_ERROR_SPECIAL					    \
16213363ab9SBenjamin Herrenschmidt 	addi	r11,r13,PACA_EXTLB;					    \
16313363ab9SBenjamin Herrenschmidt 	TLB_MISS_RESTORE(r11)
16413363ab9SBenjamin Herrenschmidt 
16513363ab9SBenjamin Herrenschmidt #ifdef CONFIG_BOOK3E_MMU_TLB_STATS
16613363ab9SBenjamin Herrenschmidt #define TLB_MISS_PROLOG_STATS						    \
16713363ab9SBenjamin Herrenschmidt 	mflr	r10;							    \
16813363ab9SBenjamin Herrenschmidt 	std	r8,EX_TLB_R8(r12);					    \
16913363ab9SBenjamin Herrenschmidt 	std	r9,EX_TLB_R9(r12);					    \
17013363ab9SBenjamin Herrenschmidt 	std	r10,EX_TLB_LR(r12);
17113363ab9SBenjamin Herrenschmidt #define TLB_MISS_RESTORE_STATS					            \
17213363ab9SBenjamin Herrenschmidt 	ld	r16,EX_TLB_LR(r12);					    \
17313363ab9SBenjamin Herrenschmidt 	ld	r9,EX_TLB_R9(r12);					    \
17413363ab9SBenjamin Herrenschmidt 	ld	r8,EX_TLB_R8(r12);					    \
17513363ab9SBenjamin Herrenschmidt 	mtlr	r16;
17613363ab9SBenjamin Herrenschmidt #define TLB_MISS_STATS_D(name)						    \
17713363ab9SBenjamin Herrenschmidt 	addi	r9,r13,MMSTAT_DSTATS+name;				    \
178b1576fecSAnton Blanchard 	bl	tlb_stat_inc;
17913363ab9SBenjamin Herrenschmidt #define TLB_MISS_STATS_I(name)						    \
18013363ab9SBenjamin Herrenschmidt 	addi	r9,r13,MMSTAT_ISTATS+name;				    \
181b1576fecSAnton Blanchard 	bl	tlb_stat_inc;
18213363ab9SBenjamin Herrenschmidt #define TLB_MISS_STATS_X(name)						    \
18313363ab9SBenjamin Herrenschmidt 	ld	r8,PACA_EXTLB+EX_TLB_ESR(r13);				    \
18413363ab9SBenjamin Herrenschmidt 	cmpdi	cr2,r8,-1;						    \
18513363ab9SBenjamin Herrenschmidt 	beq	cr2,61f;						    \
18613363ab9SBenjamin Herrenschmidt 	addi	r9,r13,MMSTAT_DSTATS+name;				    \
18713363ab9SBenjamin Herrenschmidt 	b	62f;							    \
18813363ab9SBenjamin Herrenschmidt 61:	addi	r9,r13,MMSTAT_ISTATS+name;				    \
189b1576fecSAnton Blanchard 62:	bl	tlb_stat_inc;
19013363ab9SBenjamin Herrenschmidt #define TLB_MISS_STATS_SAVE_INFO					    \
191f67f4ef5SScott Wood 	std	r14,EX_TLB_ESR(r12);	/* save ESR */
192f67f4ef5SScott Wood #define TLB_MISS_STATS_SAVE_INFO_BOLTED					    \
193f67f4ef5SScott Wood 	std	r14,PACA_EXTLB+EX_TLB_ESR(r13);	/* save ESR */
19413363ab9SBenjamin Herrenschmidt #else
19513363ab9SBenjamin Herrenschmidt #define TLB_MISS_PROLOG_STATS
19613363ab9SBenjamin Herrenschmidt #define TLB_MISS_RESTORE_STATS
197f67f4ef5SScott Wood #define TLB_MISS_PROLOG_STATS_BOLTED
198f67f4ef5SScott Wood #define TLB_MISS_RESTORE_STATS_BOLTED
19913363ab9SBenjamin Herrenschmidt #define TLB_MISS_STATS_D(name)
20013363ab9SBenjamin Herrenschmidt #define TLB_MISS_STATS_I(name)
20113363ab9SBenjamin Herrenschmidt #define TLB_MISS_STATS_X(name)
20213363ab9SBenjamin Herrenschmidt #define TLB_MISS_STATS_Y(name)
20313363ab9SBenjamin Herrenschmidt #define TLB_MISS_STATS_SAVE_INFO
204f67f4ef5SScott Wood #define TLB_MISS_STATS_SAVE_INFO_BOLTED
20513363ab9SBenjamin Herrenschmidt #endif
20613363ab9SBenjamin Herrenschmidt 
2074b98d9e7SKumar Gala #define SET_IVOR(vector_number, vector_offset)	\
2081cb6e064STiejun Chen 	LOAD_REG_ADDR(r3,interrupt_base_book3e);\
2091cb6e064STiejun Chen 	ori	r3,r3,vector_offset@l;		\
2104b98d9e7SKumar Gala 	mtspr	SPRN_IVOR##vector_number,r3;
21113363ab9SBenjamin Herrenschmidt 
21213363ab9SBenjamin Herrenschmidt #endif /* _ASM_POWERPC_EXCEPTION_64E_H */
21313363ab9SBenjamin Herrenschmidt 
214