1 #ifndef _ASM_POWERPC_BOOK3S_64_MMU_H_ 2 #define _ASM_POWERPC_BOOK3S_64_MMU_H_ 3 4 #ifndef __ASSEMBLY__ 5 /* 6 * Page size definition 7 * 8 * shift : is the "PAGE_SHIFT" value for that page size 9 * sllp : is a bit mask with the value of SLB L || LP to be or'ed 10 * directly to a slbmte "vsid" value 11 * penc : is the HPTE encoding mask for the "LP" field: 12 * 13 */ 14 struct mmu_psize_def { 15 unsigned int shift; /* number of bits */ 16 int penc[MMU_PAGE_COUNT]; /* HPTE encoding */ 17 unsigned int tlbiel; /* tlbiel supported for that page size */ 18 unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */ 19 union { 20 unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */ 21 unsigned long ap; /* Ap encoding used by PowerISA 3.0 */ 22 }; 23 }; 24 extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; 25 26 #endif /* __ASSEMBLY__ */ 27 28 /* 64-bit classic hash table MMU */ 29 #include <asm/book3s/64/mmu-hash.h> 30 31 #ifndef __ASSEMBLY__ 32 /* 33 * ISA 3.0 partiton and process table entry format 34 */ 35 struct prtb_entry { 36 __be64 prtb0; 37 __be64 prtb1; 38 }; 39 extern struct prtb_entry *process_tb; 40 41 struct patb_entry { 42 __be64 patb0; 43 __be64 patb1; 44 }; 45 extern struct patb_entry *partition_tb; 46 47 #define PATB_HR (1UL << 63) 48 #define PATB_GR (1UL << 63) 49 #define RPDB_MASK 0x0ffffffffffff00fUL 50 #define RPDB_SHIFT (1UL << 8) 51 /* 52 * Limit process table to PAGE_SIZE table. This 53 * also limit the max pid we can support. 54 * MAX_USER_CONTEXT * 16 bytes of space. 55 */ 56 #define PRTB_SIZE_SHIFT (CONTEXT_BITS + 4) 57 /* 58 * Power9 currently only support 64K partition table size. 59 */ 60 #define PATB_SIZE_SHIFT 16 61 62 typedef unsigned long mm_context_id_t; 63 struct spinlock; 64 65 typedef struct { 66 mm_context_id_t id; 67 u16 user_psize; /* page size index */ 68 69 #ifdef CONFIG_PPC_MM_SLICES 70 u64 low_slices_psize; /* SLB page size encodings */ 71 unsigned char high_slices_psize[SLICE_ARRAY_SIZE]; 72 #else 73 u16 sllp; /* SLB page size encoding */ 74 #endif 75 unsigned long vdso_base; 76 #ifdef CONFIG_PPC_SUBPAGE_PROT 77 struct subpage_prot_table spt; 78 #endif /* CONFIG_PPC_SUBPAGE_PROT */ 79 #ifdef CONFIG_PPC_ICSWX 80 struct spinlock *cop_lockp; /* guard acop and cop_pid */ 81 unsigned long acop; /* mask of enabled coprocessor types */ 82 unsigned int cop_pid; /* pid value used with coprocessors */ 83 #endif /* CONFIG_PPC_ICSWX */ 84 #ifdef CONFIG_PPC_64K_PAGES 85 /* for 4K PTE fragment support */ 86 void *pte_frag; 87 #endif 88 #ifdef CONFIG_SPAPR_TCE_IOMMU 89 struct list_head iommu_group_mem_list; 90 #endif 91 } mm_context_t; 92 93 /* 94 * The current system page and segment sizes 95 */ 96 extern int mmu_linear_psize; 97 extern int mmu_virtual_psize; 98 extern int mmu_vmalloc_psize; 99 extern int mmu_vmemmap_psize; 100 extern int mmu_io_psize; 101 102 /* MMU initialization */ 103 void mmu_early_init_devtree(void); 104 void hash__early_init_devtree(void); 105 void radix__early_init_devtree(void); 106 extern void radix_init_native(void); 107 extern void hash__early_init_mmu(void); 108 extern void radix__early_init_mmu(void); 109 static inline void early_init_mmu(void) 110 { 111 if (radix_enabled()) 112 return radix__early_init_mmu(); 113 return hash__early_init_mmu(); 114 } 115 extern void hash__early_init_mmu_secondary(void); 116 extern void radix__early_init_mmu_secondary(void); 117 static inline void early_init_mmu_secondary(void) 118 { 119 if (radix_enabled()) 120 return radix__early_init_mmu_secondary(); 121 return hash__early_init_mmu_secondary(); 122 } 123 124 extern void hash__setup_initial_memory_limit(phys_addr_t first_memblock_base, 125 phys_addr_t first_memblock_size); 126 extern void radix__setup_initial_memory_limit(phys_addr_t first_memblock_base, 127 phys_addr_t first_memblock_size); 128 static inline void setup_initial_memory_limit(phys_addr_t first_memblock_base, 129 phys_addr_t first_memblock_size) 130 { 131 if (early_radix_enabled()) 132 return radix__setup_initial_memory_limit(first_memblock_base, 133 first_memblock_size); 134 return hash__setup_initial_memory_limit(first_memblock_base, 135 first_memblock_size); 136 } 137 138 extern int (*register_process_table)(unsigned long base, unsigned long page_size, 139 unsigned long tbl_size); 140 141 #endif /* __ASSEMBLY__ */ 142 #endif /* _ASM_POWERPC_BOOK3S_64_MMU_H_ */ 143