1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H
3 #define _ASM_POWERPC_BOOK3S_64_HASH_4K_H
4 /*
5  * Entries per page directory level.  The PTE level must use a 64b record
6  * for each page table entry.  The PMD and PGD level use a 32b record for
7  * each entry by assuming that each entry is page aligned.
8  */
9 #define H_PTE_INDEX_SIZE  9
10 #define H_PMD_INDEX_SIZE  7
11 #define H_PUD_INDEX_SIZE  9
12 #define H_PGD_INDEX_SIZE  9
13 
14 /*
15  * Each context is 512TB. But on 4k we restrict our max TASK size to 64TB
16  * Hence also limit max EA bits to 64TB.
17  */
18 #define MAX_EA_BITS_PER_CONTEXT		46
19 
20 #ifndef __ASSEMBLY__
21 #define H_PTE_TABLE_SIZE	(sizeof(pte_t) << H_PTE_INDEX_SIZE)
22 #define H_PMD_TABLE_SIZE	(sizeof(pmd_t) << H_PMD_INDEX_SIZE)
23 #define H_PUD_TABLE_SIZE	(sizeof(pud_t) << H_PUD_INDEX_SIZE)
24 #define H_PGD_TABLE_SIZE	(sizeof(pgd_t) << H_PGD_INDEX_SIZE)
25 
26 #define H_PAGE_F_GIX_SHIFT	53
27 #define H_PAGE_F_SECOND	_RPAGE_RPN44	/* HPTE is in 2ndary HPTEG */
28 #define H_PAGE_F_GIX	(_RPAGE_RPN43 | _RPAGE_RPN42 | _RPAGE_RPN41)
29 #define H_PAGE_BUSY	_RPAGE_RSV1     /* software: PTE & hash are busy */
30 #define H_PAGE_HASHPTE	_RPAGE_RSV2     /* software: PTE & hash are busy */
31 
32 /* PTE flags to conserve for HPTE identification */
33 #define _PAGE_HPTEFLAGS (H_PAGE_BUSY | H_PAGE_HASHPTE | \
34 			 H_PAGE_F_SECOND | H_PAGE_F_GIX)
35 /*
36  * Not supported by 4k linux page size
37  */
38 #define H_PAGE_4K_PFN	0x0
39 #define H_PAGE_THP_HUGE 0x0
40 #define H_PAGE_COMBO	0x0
41 
42 /* 8 bytes per each pte entry */
43 #define H_PTE_FRAG_SIZE_SHIFT  (H_PTE_INDEX_SIZE + 3)
44 #define H_PTE_FRAG_NR	(PAGE_SIZE >> H_PTE_FRAG_SIZE_SHIFT)
45 #define H_PMD_FRAG_SIZE_SHIFT  (H_PMD_INDEX_SIZE + 3)
46 #define H_PMD_FRAG_NR	(PAGE_SIZE >> H_PMD_FRAG_SIZE_SHIFT)
47 
48 /* memory key bits, only 8 keys supported */
49 #define H_PTE_PKEY_BIT0	0
50 #define H_PTE_PKEY_BIT1	0
51 #define H_PTE_PKEY_BIT2	_RPAGE_RSV3
52 #define H_PTE_PKEY_BIT3	_RPAGE_RSV4
53 #define H_PTE_PKEY_BIT4	_RPAGE_RSV5
54 
55 /*
56  * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
57  */
58 #define remap_4k_pfn(vma, addr, pfn, prot)	\
59 	remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
60 
61 #ifdef CONFIG_HUGETLB_PAGE
62 static inline int hash__hugepd_ok(hugepd_t hpd)
63 {
64 	unsigned long hpdval = hpd_val(hpd);
65 	/*
66 	 * if it is not a pte and have hugepd shift mask
67 	 * set, then it is a hugepd directory pointer
68 	 */
69 	if (!(hpdval & _PAGE_PTE) &&
70 	    ((hpdval & HUGEPD_SHIFT_MASK) != 0))
71 		return true;
72 	return false;
73 }
74 #endif
75 
76 /*
77  * 4K PTE format is different from 64K PTE format. Saving the hash_slot is just
78  * a matter of returning the PTE bits that need to be modified. On 64K PTE,
79  * things are a little more involved and hence needs many more parameters to
80  * accomplish the same. However we want to abstract this out from the caller by
81  * keeping the prototype consistent across the two formats.
82  */
83 static inline unsigned long pte_set_hidx(pte_t *ptep, real_pte_t rpte,
84 					 unsigned int subpg_index, unsigned long hidx,
85 					 int offset)
86 {
87 	return (hidx << H_PAGE_F_GIX_SHIFT) &
88 		(H_PAGE_F_SECOND | H_PAGE_F_GIX);
89 }
90 
91 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
92 
93 static inline char *get_hpte_slot_array(pmd_t *pmdp)
94 {
95 	BUG();
96 	return NULL;
97 }
98 
99 static inline unsigned int hpte_valid(unsigned char *hpte_slot_array, int index)
100 {
101 	BUG();
102 	return 0;
103 }
104 
105 static inline unsigned int hpte_hash_index(unsigned char *hpte_slot_array,
106 					   int index)
107 {
108 	BUG();
109 	return 0;
110 }
111 
112 static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array,
113 					unsigned int index, unsigned int hidx)
114 {
115 	BUG();
116 }
117 
118 static inline int hash__pmd_trans_huge(pmd_t pmd)
119 {
120 	return 0;
121 }
122 
123 static inline int hash__pmd_same(pmd_t pmd_a, pmd_t pmd_b)
124 {
125 	BUG();
126 	return 0;
127 }
128 
129 static inline pmd_t hash__pmd_mkhuge(pmd_t pmd)
130 {
131 	BUG();
132 	return pmd;
133 }
134 
135 extern unsigned long hash__pmd_hugepage_update(struct mm_struct *mm,
136 					   unsigned long addr, pmd_t *pmdp,
137 					   unsigned long clr, unsigned long set);
138 extern pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *vma,
139 				   unsigned long address, pmd_t *pmdp);
140 extern void hash__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
141 					 pgtable_t pgtable);
142 extern pgtable_t hash__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
143 extern pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm,
144 				       unsigned long addr, pmd_t *pmdp);
145 extern int hash__has_transparent_hugepage(void);
146 #endif
147 
148 #endif /* !__ASSEMBLY__ */
149 
150 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */
151