1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H 3 #define _ASM_POWERPC_BOOK3S_64_HASH_4K_H 4 5 #define H_PTE_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 4KB = 2MB 6 #define H_PMD_INDEX_SIZE 7 // size: 8B << 7 = 1KB, maps: 2^7 x 2MB = 256MB 7 #define H_PUD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 256MB = 128GB 8 #define H_PGD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 128GB = 64TB 9 10 /* 11 * Each context is 512TB. But on 4k we restrict our max TASK size to 64TB 12 * Hence also limit max EA bits to 64TB. 13 */ 14 #define MAX_EA_BITS_PER_CONTEXT 46 15 16 #define REGION_SHIFT (MAX_EA_BITS_PER_CONTEXT - 2) 17 18 /* 19 * Our page table limit us to 64TB. Hence for the kernel mapping, 20 * each MAP area is limited to 16 TB. 21 * The four map areas are: linear mapping, vmap, IO and vmemmap 22 */ 23 #define H_KERN_MAP_SIZE (ASM_CONST(1) << REGION_SHIFT) 24 25 /* 26 * Define the address range of the kernel non-linear virtual area 27 * 16TB 28 */ 29 #define H_KERN_VIRT_START ASM_CONST(0xc000100000000000) 30 31 #ifndef __ASSEMBLY__ 32 #define H_PTE_TABLE_SIZE (sizeof(pte_t) << H_PTE_INDEX_SIZE) 33 #define H_PMD_TABLE_SIZE (sizeof(pmd_t) << H_PMD_INDEX_SIZE) 34 #define H_PUD_TABLE_SIZE (sizeof(pud_t) << H_PUD_INDEX_SIZE) 35 #define H_PGD_TABLE_SIZE (sizeof(pgd_t) << H_PGD_INDEX_SIZE) 36 37 #define H_PAGE_F_GIX_SHIFT _PAGE_PA_MAX 38 #define H_PAGE_F_SECOND _RPAGE_PKEY_BIT0 /* HPTE is in 2ndary HPTEG */ 39 #define H_PAGE_F_GIX (_RPAGE_RPN43 | _RPAGE_RPN42 | _RPAGE_RPN41) 40 #define H_PAGE_BUSY _RPAGE_RSV1 41 #define H_PAGE_HASHPTE _RPAGE_PKEY_BIT4 42 43 /* PTE flags to conserve for HPTE identification */ 44 #define _PAGE_HPTEFLAGS (H_PAGE_BUSY | H_PAGE_HASHPTE | \ 45 H_PAGE_F_SECOND | H_PAGE_F_GIX) 46 /* 47 * Not supported by 4k linux page size 48 */ 49 #define H_PAGE_4K_PFN 0x0 50 #define H_PAGE_THP_HUGE 0x0 51 #define H_PAGE_COMBO 0x0 52 53 /* 8 bytes per each pte entry */ 54 #define H_PTE_FRAG_SIZE_SHIFT (H_PTE_INDEX_SIZE + 3) 55 #define H_PTE_FRAG_NR (PAGE_SIZE >> H_PTE_FRAG_SIZE_SHIFT) 56 #define H_PMD_FRAG_SIZE_SHIFT (H_PMD_INDEX_SIZE + 3) 57 #define H_PMD_FRAG_NR (PAGE_SIZE >> H_PMD_FRAG_SIZE_SHIFT) 58 59 /* memory key bits, only 8 keys supported */ 60 #define H_PTE_PKEY_BIT4 0 61 #define H_PTE_PKEY_BIT3 0 62 #define H_PTE_PKEY_BIT2 _RPAGE_PKEY_BIT3 63 #define H_PTE_PKEY_BIT1 _RPAGE_PKEY_BIT2 64 #define H_PTE_PKEY_BIT0 _RPAGE_PKEY_BIT1 65 66 67 /* 68 * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range() 69 */ 70 #define remap_4k_pfn(vma, addr, pfn, prot) \ 71 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot)) 72 73 #ifdef CONFIG_HUGETLB_PAGE 74 static inline int hash__hugepd_ok(hugepd_t hpd) 75 { 76 unsigned long hpdval = hpd_val(hpd); 77 /* 78 * if it is not a pte and have hugepd shift mask 79 * set, then it is a hugepd directory pointer 80 */ 81 if (!(hpdval & _PAGE_PTE) && (hpdval & _PAGE_PRESENT) && 82 ((hpdval & HUGEPD_SHIFT_MASK) != 0)) 83 return true; 84 return false; 85 } 86 #endif 87 88 /* 89 * 4K PTE format is different from 64K PTE format. Saving the hash_slot is just 90 * a matter of returning the PTE bits that need to be modified. On 64K PTE, 91 * things are a little more involved and hence needs many more parameters to 92 * accomplish the same. However we want to abstract this out from the caller by 93 * keeping the prototype consistent across the two formats. 94 */ 95 static inline unsigned long pte_set_hidx(pte_t *ptep, real_pte_t rpte, 96 unsigned int subpg_index, unsigned long hidx, 97 int offset) 98 { 99 return (hidx << H_PAGE_F_GIX_SHIFT) & 100 (H_PAGE_F_SECOND | H_PAGE_F_GIX); 101 } 102 103 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 104 105 static inline char *get_hpte_slot_array(pmd_t *pmdp) 106 { 107 BUG(); 108 return NULL; 109 } 110 111 static inline unsigned int hpte_valid(unsigned char *hpte_slot_array, int index) 112 { 113 BUG(); 114 return 0; 115 } 116 117 static inline unsigned int hpte_hash_index(unsigned char *hpte_slot_array, 118 int index) 119 { 120 BUG(); 121 return 0; 122 } 123 124 static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array, 125 unsigned int index, unsigned int hidx) 126 { 127 BUG(); 128 } 129 130 static inline int hash__pmd_trans_huge(pmd_t pmd) 131 { 132 return 0; 133 } 134 135 static inline int hash__pmd_same(pmd_t pmd_a, pmd_t pmd_b) 136 { 137 BUG(); 138 return 0; 139 } 140 141 static inline pmd_t hash__pmd_mkhuge(pmd_t pmd) 142 { 143 BUG(); 144 return pmd; 145 } 146 147 extern unsigned long hash__pmd_hugepage_update(struct mm_struct *mm, 148 unsigned long addr, pmd_t *pmdp, 149 unsigned long clr, unsigned long set); 150 extern pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *vma, 151 unsigned long address, pmd_t *pmdp); 152 extern void hash__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, 153 pgtable_t pgtable); 154 extern pgtable_t hash__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); 155 extern pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm, 156 unsigned long addr, pmd_t *pmdp); 157 extern int hash__has_transparent_hugepage(void); 158 #endif 159 160 static inline pmd_t hash__pmd_mkdevmap(pmd_t pmd) 161 { 162 BUG(); 163 return pmd; 164 } 165 166 #endif /* !__ASSEMBLY__ */ 167 168 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */ 169