1 /* 2 * PowerPC atomic bit operations. 3 * 4 * Merged version by David Gibson <david@gibson.dropbear.id.au>. 5 * Based on ppc64 versions by: Dave Engebretsen, Todd Inglett, Don 6 * Reed, Pat McCarthy, Peter Bergner, Anton Blanchard. They 7 * originally took it from the ppc32 code. 8 * 9 * Within a word, bits are numbered LSB first. Lot's of places make 10 * this assumption by directly testing bits with (val & (1<<nr)). 11 * This can cause confusion for large (> 1 word) bitmaps on a 12 * big-endian system because, unlike little endian, the number of each 13 * bit depends on the word size. 14 * 15 * The bitop functions are defined to work on unsigned longs, so for a 16 * ppc64 system the bits end up numbered: 17 * |63..............0|127............64|191...........128|255...........196| 18 * and on ppc32: 19 * |31.....0|63....31|95....64|127...96|159..128|191..160|223..192|255..224| 20 * 21 * There are a few little-endian macros used mostly for filesystem 22 * bitmaps, these work on similar bit arrays layouts, but 23 * byte-oriented: 24 * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56| 25 * 26 * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit 27 * number field needs to be reversed compared to the big-endian bit 28 * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b). 29 * 30 * This program is free software; you can redistribute it and/or 31 * modify it under the terms of the GNU General Public License 32 * as published by the Free Software Foundation; either version 33 * 2 of the License, or (at your option) any later version. 34 */ 35 36 #ifndef _ASM_POWERPC_BITOPS_H 37 #define _ASM_POWERPC_BITOPS_H 38 39 #ifdef __KERNEL__ 40 41 #ifndef _LINUX_BITOPS_H 42 #error only <linux/bitops.h> can be included directly 43 #endif 44 45 #include <linux/compiler.h> 46 #include <asm/asm-compat.h> 47 #include <asm/synch.h> 48 49 /* PPC bit number conversion */ 50 #define PPC_BITLSHIFT(be) (BITS_PER_LONG - 1 - (be)) 51 #define PPC_BIT(bit) (1UL << PPC_BITLSHIFT(bit)) 52 #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs)) 53 54 /* 55 * clear_bit doesn't imply a memory barrier 56 */ 57 #define smp_mb__before_clear_bit() smp_mb() 58 #define smp_mb__after_clear_bit() smp_mb() 59 60 /* Macro for generating the ***_bits() functions */ 61 #define DEFINE_BITOP(fn, op, prefix) \ 62 static __inline__ void fn(unsigned long mask, \ 63 volatile unsigned long *_p) \ 64 { \ 65 unsigned long old; \ 66 unsigned long *p = (unsigned long *)_p; \ 67 __asm__ __volatile__ ( \ 68 prefix \ 69 "1:" PPC_LLARX(%0,0,%3,0) "\n" \ 70 stringify_in_c(op) "%0,%0,%2\n" \ 71 PPC405_ERR77(0,%3) \ 72 PPC_STLCX "%0,0,%3\n" \ 73 "bne- 1b\n" \ 74 : "=&r" (old), "+m" (*p) \ 75 : "r" (mask), "r" (p) \ 76 : "cc", "memory"); \ 77 } 78 79 DEFINE_BITOP(set_bits, or, "") 80 DEFINE_BITOP(clear_bits, andc, "") 81 DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER) 82 DEFINE_BITOP(change_bits, xor, "") 83 84 static __inline__ void set_bit(int nr, volatile unsigned long *addr) 85 { 86 set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)); 87 } 88 89 static __inline__ void clear_bit(int nr, volatile unsigned long *addr) 90 { 91 clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr)); 92 } 93 94 static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr) 95 { 96 clear_bits_unlock(BIT_MASK(nr), addr + BIT_WORD(nr)); 97 } 98 99 static __inline__ void change_bit(int nr, volatile unsigned long *addr) 100 { 101 change_bits(BIT_MASK(nr), addr + BIT_WORD(nr)); 102 } 103 104 /* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output 105 * operands. */ 106 #define DEFINE_TESTOP(fn, op, prefix, postfix, eh) \ 107 static __inline__ unsigned long fn( \ 108 unsigned long mask, \ 109 volatile unsigned long *_p) \ 110 { \ 111 unsigned long old, t; \ 112 unsigned long *p = (unsigned long *)_p; \ 113 __asm__ __volatile__ ( \ 114 prefix \ 115 "1:" PPC_LLARX(%0,0,%3,eh) "\n" \ 116 stringify_in_c(op) "%1,%0,%2\n" \ 117 PPC405_ERR77(0,%3) \ 118 PPC_STLCX "%1,0,%3\n" \ 119 "bne- 1b\n" \ 120 postfix \ 121 : "=&r" (old), "=&r" (t) \ 122 : "r" (mask), "r" (p) \ 123 : "cc", "memory"); \ 124 return (old & mask); \ 125 } 126 127 DEFINE_TESTOP(test_and_set_bits, or, PPC_ATOMIC_ENTRY_BARRIER, 128 PPC_ATOMIC_EXIT_BARRIER, 0) 129 DEFINE_TESTOP(test_and_set_bits_lock, or, "", 130 PPC_ACQUIRE_BARRIER, 1) 131 DEFINE_TESTOP(test_and_clear_bits, andc, PPC_ATOMIC_ENTRY_BARRIER, 132 PPC_ATOMIC_EXIT_BARRIER, 0) 133 DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER, 134 PPC_ATOMIC_EXIT_BARRIER, 0) 135 136 static __inline__ int test_and_set_bit(unsigned long nr, 137 volatile unsigned long *addr) 138 { 139 return test_and_set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0; 140 } 141 142 static __inline__ int test_and_set_bit_lock(unsigned long nr, 143 volatile unsigned long *addr) 144 { 145 return test_and_set_bits_lock(BIT_MASK(nr), 146 addr + BIT_WORD(nr)) != 0; 147 } 148 149 static __inline__ int test_and_clear_bit(unsigned long nr, 150 volatile unsigned long *addr) 151 { 152 return test_and_clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0; 153 } 154 155 static __inline__ int test_and_change_bit(unsigned long nr, 156 volatile unsigned long *addr) 157 { 158 return test_and_change_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0; 159 } 160 161 #include <asm-generic/bitops/non-atomic.h> 162 163 static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr) 164 { 165 __asm__ __volatile__(PPC_RELEASE_BARRIER "" ::: "memory"); 166 __clear_bit(nr, addr); 167 } 168 169 /* 170 * Return the zero-based bit position (LE, not IBM bit numbering) of 171 * the most significant 1-bit in a double word. 172 */ 173 static __inline__ __attribute__((const)) 174 int __ilog2(unsigned long x) 175 { 176 int lz; 177 178 asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x)); 179 return BITS_PER_LONG - 1 - lz; 180 } 181 182 static inline __attribute__((const)) 183 int __ilog2_u32(u32 n) 184 { 185 int bit; 186 asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n)); 187 return 31 - bit; 188 } 189 190 #ifdef __powerpc64__ 191 static inline __attribute__((const)) 192 int __ilog2_u64(u64 n) 193 { 194 int bit; 195 asm ("cntlzd %0,%1" : "=r" (bit) : "r" (n)); 196 return 63 - bit; 197 } 198 #endif 199 200 /* 201 * Determines the bit position of the least significant 0 bit in the 202 * specified double word. The returned bit position will be 203 * zero-based, starting from the right side (63/31 - 0). 204 */ 205 static __inline__ unsigned long ffz(unsigned long x) 206 { 207 /* no zero exists anywhere in the 8 byte area. */ 208 if ((x = ~x) == 0) 209 return BITS_PER_LONG; 210 211 /* 212 * Calculate the bit position of the least significant '1' bit in x 213 * (since x has been changed this will actually be the least significant 214 * '0' bit in * the original x). Note: (x & -x) gives us a mask that 215 * is the least significant * (RIGHT-most) 1-bit of the value in x. 216 */ 217 return __ilog2(x & -x); 218 } 219 220 static __inline__ int __ffs(unsigned long x) 221 { 222 return __ilog2(x & -x); 223 } 224 225 /* 226 * ffs: find first bit set. This is defined the same way as 227 * the libc and compiler builtin ffs routines, therefore 228 * differs in spirit from the above ffz (man ffs). 229 */ 230 static __inline__ int ffs(int x) 231 { 232 unsigned long i = (unsigned long)x; 233 return __ilog2(i & -i) + 1; 234 } 235 236 /* 237 * fls: find last (most-significant) bit set. 238 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. 239 */ 240 static __inline__ int fls(unsigned int x) 241 { 242 int lz; 243 244 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x)); 245 return 32 - lz; 246 } 247 248 static __inline__ unsigned long __fls(unsigned long x) 249 { 250 return __ilog2(x); 251 } 252 253 /* 254 * 64-bit can do this using one cntlzd (count leading zeroes doubleword) 255 * instruction; for 32-bit we use the generic version, which does two 256 * 32-bit fls calls. 257 */ 258 #ifdef __powerpc64__ 259 static __inline__ int fls64(__u64 x) 260 { 261 int lz; 262 263 asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x)); 264 return 64 - lz; 265 } 266 #else 267 #include <asm-generic/bitops/fls64.h> 268 #endif /* __powerpc64__ */ 269 270 #ifdef CONFIG_PPC64 271 unsigned int __arch_hweight8(unsigned int w); 272 unsigned int __arch_hweight16(unsigned int w); 273 unsigned int __arch_hweight32(unsigned int w); 274 unsigned long __arch_hweight64(__u64 w); 275 #include <asm-generic/bitops/const_hweight.h> 276 #else 277 #include <asm-generic/bitops/hweight.h> 278 #endif 279 280 #include <asm-generic/bitops/find.h> 281 282 /* Little-endian versions */ 283 #include <asm-generic/bitops/le.h> 284 285 /* Bitmap functions for the ext2 filesystem */ 286 287 #include <asm-generic/bitops/ext2-atomic-setbit.h> 288 289 #include <asm-generic/bitops/sched.h> 290 291 #endif /* __KERNEL__ */ 292 293 #endif /* _ASM_POWERPC_BITOPS_H */ 294