1 /* 2 * PowerPC atomic bit operations. 3 * 4 * Merged version by David Gibson <david@gibson.dropbear.id.au>. 5 * Based on ppc64 versions by: Dave Engebretsen, Todd Inglett, Don 6 * Reed, Pat McCarthy, Peter Bergner, Anton Blanchard. They 7 * originally took it from the ppc32 code. 8 * 9 * Within a word, bits are numbered LSB first. Lot's of places make 10 * this assumption by directly testing bits with (val & (1<<nr)). 11 * This can cause confusion for large (> 1 word) bitmaps on a 12 * big-endian system because, unlike little endian, the number of each 13 * bit depends on the word size. 14 * 15 * The bitop functions are defined to work on unsigned longs, so for a 16 * ppc64 system the bits end up numbered: 17 * |63..............0|127............64|191...........128|255...........192| 18 * and on ppc32: 19 * |31.....0|63....32|95....64|127...96|159..128|191..160|223..192|255..224| 20 * 21 * There are a few little-endian macros used mostly for filesystem 22 * bitmaps, these work on similar bit arrays layouts, but 23 * byte-oriented: 24 * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56| 25 * 26 * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit 27 * number field needs to be reversed compared to the big-endian bit 28 * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b). 29 * 30 * This program is free software; you can redistribute it and/or 31 * modify it under the terms of the GNU General Public License 32 * as published by the Free Software Foundation; either version 33 * 2 of the License, or (at your option) any later version. 34 */ 35 36 #ifndef _ASM_POWERPC_BITOPS_H 37 #define _ASM_POWERPC_BITOPS_H 38 39 #ifdef __KERNEL__ 40 41 #ifndef _LINUX_BITOPS_H 42 #error only <linux/bitops.h> can be included directly 43 #endif 44 45 #include <linux/compiler.h> 46 #include <asm/asm-compat.h> 47 #include <asm/synch.h> 48 49 /* PPC bit number conversion */ 50 #define PPC_BITLSHIFT(be) (BITS_PER_LONG - 1 - (be)) 51 #define PPC_BIT(bit) (1UL << PPC_BITLSHIFT(bit)) 52 #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs)) 53 54 /* Put a PPC bit into a "normal" bit position */ 55 #define PPC_BITEXTRACT(bits, ppc_bit, dst_bit) \ 56 ((((bits) >> PPC_BITLSHIFT(ppc_bit)) & 1) << (dst_bit)) 57 58 #include <asm/barrier.h> 59 60 /* Macro for generating the ***_bits() functions */ 61 #define DEFINE_BITOP(fn, op, prefix) \ 62 static __inline__ void fn(unsigned long mask, \ 63 volatile unsigned long *_p) \ 64 { \ 65 unsigned long old; \ 66 unsigned long *p = (unsigned long *)_p; \ 67 __asm__ __volatile__ ( \ 68 prefix \ 69 "1:" PPC_LLARX(%0,0,%3,0) "\n" \ 70 stringify_in_c(op) "%0,%0,%2\n" \ 71 PPC405_ERR77(0,%3) \ 72 PPC_STLCX "%0,0,%3\n" \ 73 "bne- 1b\n" \ 74 : "=&r" (old), "+m" (*p) \ 75 : "r" (mask), "r" (p) \ 76 : "cc", "memory"); \ 77 } 78 79 DEFINE_BITOP(set_bits, or, "") 80 DEFINE_BITOP(clear_bits, andc, "") 81 DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER) 82 DEFINE_BITOP(change_bits, xor, "") 83 84 static __inline__ void set_bit(int nr, volatile unsigned long *addr) 85 { 86 set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)); 87 } 88 89 static __inline__ void clear_bit(int nr, volatile unsigned long *addr) 90 { 91 clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr)); 92 } 93 94 static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr) 95 { 96 clear_bits_unlock(BIT_MASK(nr), addr + BIT_WORD(nr)); 97 } 98 99 static __inline__ void change_bit(int nr, volatile unsigned long *addr) 100 { 101 change_bits(BIT_MASK(nr), addr + BIT_WORD(nr)); 102 } 103 104 /* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output 105 * operands. */ 106 #define DEFINE_TESTOP(fn, op, prefix, postfix, eh) \ 107 static __inline__ unsigned long fn( \ 108 unsigned long mask, \ 109 volatile unsigned long *_p) \ 110 { \ 111 unsigned long old, t; \ 112 unsigned long *p = (unsigned long *)_p; \ 113 __asm__ __volatile__ ( \ 114 prefix \ 115 "1:" PPC_LLARX(%0,0,%3,eh) "\n" \ 116 stringify_in_c(op) "%1,%0,%2\n" \ 117 PPC405_ERR77(0,%3) \ 118 PPC_STLCX "%1,0,%3\n" \ 119 "bne- 1b\n" \ 120 postfix \ 121 : "=&r" (old), "=&r" (t) \ 122 : "r" (mask), "r" (p) \ 123 : "cc", "memory"); \ 124 return (old & mask); \ 125 } 126 127 DEFINE_TESTOP(test_and_set_bits, or, PPC_ATOMIC_ENTRY_BARRIER, 128 PPC_ATOMIC_EXIT_BARRIER, 0) 129 DEFINE_TESTOP(test_and_set_bits_lock, or, "", 130 PPC_ACQUIRE_BARRIER, 1) 131 DEFINE_TESTOP(test_and_clear_bits, andc, PPC_ATOMIC_ENTRY_BARRIER, 132 PPC_ATOMIC_EXIT_BARRIER, 0) 133 DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER, 134 PPC_ATOMIC_EXIT_BARRIER, 0) 135 136 static __inline__ int test_and_set_bit(unsigned long nr, 137 volatile unsigned long *addr) 138 { 139 return test_and_set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0; 140 } 141 142 static __inline__ int test_and_set_bit_lock(unsigned long nr, 143 volatile unsigned long *addr) 144 { 145 return test_and_set_bits_lock(BIT_MASK(nr), 146 addr + BIT_WORD(nr)) != 0; 147 } 148 149 static __inline__ int test_and_clear_bit(unsigned long nr, 150 volatile unsigned long *addr) 151 { 152 return test_and_clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0; 153 } 154 155 static __inline__ int test_and_change_bit(unsigned long nr, 156 volatile unsigned long *addr) 157 { 158 return test_and_change_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0; 159 } 160 161 #ifdef CONFIG_PPC64 162 static __inline__ unsigned long clear_bit_unlock_return_word(int nr, 163 volatile unsigned long *addr) 164 { 165 unsigned long old, t; 166 unsigned long *p = (unsigned long *)addr + BIT_WORD(nr); 167 unsigned long mask = BIT_MASK(nr); 168 169 __asm__ __volatile__ ( 170 PPC_RELEASE_BARRIER 171 "1:" PPC_LLARX(%0,0,%3,0) "\n" 172 "andc %1,%0,%2\n" 173 PPC405_ERR77(0,%3) 174 PPC_STLCX "%1,0,%3\n" 175 "bne- 1b\n" 176 : "=&r" (old), "=&r" (t) 177 : "r" (mask), "r" (p) 178 : "cc", "memory"); 179 180 return old; 181 } 182 183 /* This is a special function for mm/filemap.c */ 184 #define clear_bit_unlock_is_negative_byte(nr, addr) \ 185 (clear_bit_unlock_return_word(nr, addr) & BIT_MASK(PG_waiters)) 186 187 #endif /* CONFIG_PPC64 */ 188 189 #include <asm-generic/bitops/non-atomic.h> 190 191 static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr) 192 { 193 __asm__ __volatile__(PPC_RELEASE_BARRIER "" ::: "memory"); 194 __clear_bit(nr, addr); 195 } 196 197 /* 198 * Return the zero-based bit position (LE, not IBM bit numbering) of 199 * the most significant 1-bit in a double word. 200 */ 201 static __inline__ __attribute__((const)) 202 int __ilog2(unsigned long x) 203 { 204 int lz; 205 206 asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x)); 207 return BITS_PER_LONG - 1 - lz; 208 } 209 210 static inline __attribute__((const)) 211 int __ilog2_u32(u32 n) 212 { 213 int bit; 214 asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n)); 215 return 31 - bit; 216 } 217 218 #ifdef __powerpc64__ 219 static inline __attribute__((const)) 220 int __ilog2_u64(u64 n) 221 { 222 int bit; 223 asm ("cntlzd %0,%1" : "=r" (bit) : "r" (n)); 224 return 63 - bit; 225 } 226 #endif 227 228 /* 229 * Determines the bit position of the least significant 0 bit in the 230 * specified double word. The returned bit position will be 231 * zero-based, starting from the right side (63/31 - 0). 232 */ 233 static __inline__ unsigned long ffz(unsigned long x) 234 { 235 /* no zero exists anywhere in the 8 byte area. */ 236 if ((x = ~x) == 0) 237 return BITS_PER_LONG; 238 239 /* 240 * Calculate the bit position of the least significant '1' bit in x 241 * (since x has been changed this will actually be the least significant 242 * '0' bit in * the original x). Note: (x & -x) gives us a mask that 243 * is the least significant * (RIGHT-most) 1-bit of the value in x. 244 */ 245 return __ilog2(x & -x); 246 } 247 248 static __inline__ unsigned long __ffs(unsigned long x) 249 { 250 return __ilog2(x & -x); 251 } 252 253 /* 254 * ffs: find first bit set. This is defined the same way as 255 * the libc and compiler builtin ffs routines, therefore 256 * differs in spirit from the above ffz (man ffs). 257 */ 258 static __inline__ int ffs(int x) 259 { 260 unsigned long i = (unsigned long)x; 261 return __ilog2(i & -i) + 1; 262 } 263 264 /* 265 * fls: find last (most-significant) bit set. 266 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. 267 */ 268 static __inline__ int fls(unsigned int x) 269 { 270 int lz; 271 272 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x)); 273 return 32 - lz; 274 } 275 276 static __inline__ unsigned long __fls(unsigned long x) 277 { 278 return __ilog2(x); 279 } 280 281 /* 282 * 64-bit can do this using one cntlzd (count leading zeroes doubleword) 283 * instruction; for 32-bit we use the generic version, which does two 284 * 32-bit fls calls. 285 */ 286 #ifdef __powerpc64__ 287 static __inline__ int fls64(__u64 x) 288 { 289 int lz; 290 291 asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x)); 292 return 64 - lz; 293 } 294 #else 295 #include <asm-generic/bitops/fls64.h> 296 #endif /* __powerpc64__ */ 297 298 #ifdef CONFIG_PPC64 299 unsigned int __arch_hweight8(unsigned int w); 300 unsigned int __arch_hweight16(unsigned int w); 301 unsigned int __arch_hweight32(unsigned int w); 302 unsigned long __arch_hweight64(__u64 w); 303 #include <asm-generic/bitops/const_hweight.h> 304 #else 305 #include <asm-generic/bitops/hweight.h> 306 #endif 307 308 #include <asm-generic/bitops/find.h> 309 310 /* Little-endian versions */ 311 #include <asm-generic/bitops/le.h> 312 313 /* Bitmap functions for the ext2 filesystem */ 314 315 #include <asm-generic/bitops/ext2-atomic-setbit.h> 316 317 #include <asm-generic/bitops/sched.h> 318 319 #endif /* __KERNEL__ */ 320 321 #endif /* _ASM_POWERPC_BITOPS_H */ 322