1/*
2 * arch/powerpc/boot/gamecube-head.S
3 *
4 * Nintendo GameCube bootwrapper entry.
5 * Copyright (C) 2004-2009 The GameCube Linux Team
6 * Copyright (C) 2008,2009 Albert Herranz
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 */
14
15#include "ppc_asm.h"
16
17/*
18 * The entry code does no assumptions regarding:
19 * - if the data and instruction caches are enabled or not
20 * - if the MMU is enabled or not
21 *
22 * We enable the caches if not already enabled, enable the MMU with an
23 * identity mapping scheme and jump to the start code.
24 */
25
26	.text
27
28	.globl _zimage_start
29_zimage_start:
30
31	/* turn the MMU off */
32	mfmsr	9
33	rlwinm	9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
34	bcl	20, 31, 1f
351:
36	mflr	8
37	clrlwi	8, 8, 3		/* convert to a real address */
38	addi	8, 8, _mmu_off - 1b
39	mtsrr0	8
40	mtsrr1	9
41	rfi
42_mmu_off:
43	/* MMU disabled */
44
45	/* setup BATs */
46	isync
47	li      8, 0
48	mtspr	0x210, 8	/* IBAT0U */
49	mtspr	0x212, 8	/* IBAT1U */
50	mtspr	0x214, 8	/* IBAT2U */
51	mtspr	0x216, 8	/* IBAT3U */
52	mtspr	0x218, 8	/* DBAT0U */
53	mtspr	0x21a, 8	/* DBAT1U */
54	mtspr	0x21c, 8	/* DBAT2U */
55	mtspr	0x21e, 8	/* DBAT3U */
56
57	li	8, 0x01ff	/* first 16MiB */
58	li	9, 0x0002	/* rw */
59	mtspr	0x211, 9	/* IBAT0L */
60	mtspr	0x210, 8	/* IBAT0U */
61	mtspr	0x219, 9	/* DBAT0L */
62	mtspr	0x218, 8	/* DBAT0U */
63
64	lis	8, 0x0c00	/* I/O mem */
65	ori	8, 8, 0x3ff	/* 32MiB */
66	lis	9, 0x0c00
67	ori	9, 9, 0x002a	/* uncached, guarded, rw */
68	mtspr	0x21b, 9	/* DBAT1L */
69	mtspr	0x21a, 8	/* DBAT1U */
70
71	lis	8, 0x0100	/* next 8MiB */
72	ori	8, 8, 0x00ff	/* 8MiB */
73	lis	9, 0x0100
74	ori	9, 9, 0x0002	/* rw */
75	mtspr	0x215, 9	/* IBAT2L */
76	mtspr	0x214, 8	/* IBAT2U */
77	mtspr	0x21d, 9	/* DBAT2L */
78	mtspr	0x21c, 8	/* DBAT2U */
79
80	/* enable and invalidate the caches if not already enabled */
81	mfspr	8, 0x3f0	/* HID0 */
82	andi.	0, 8, (1<<15)		/* HID0_ICE */
83	bne	1f
84	ori	8, 8, (1<<15)|(1<<11)	/* HID0_ICE|HID0_ICFI*/
851:
86	andi.	0, 8, (1<<14)		/* HID0_DCE */
87	bne	1f
88	ori	8, 8, (1<<14)|(1<<10)	/* HID0_DCE|HID0_DCFI*/
891:
90	mtspr	0x3f0, 8	/* HID0 */
91	isync
92
93	/* initialize arguments */
94	li	3, 0
95	li	4, 0
96	li	5, 0
97
98	/* turn the MMU on */
99	bcl	20, 31, 1f
1001:
101	mflr	8
102	addi	8, 8, _mmu_on - 1b
103	mfmsr	9
104	ori	9, 9, (1<<4)|(1<<5) /* MSR_DR|MSR_IR */
105	mtsrr0	8
106	mtsrr1	9
107	sync
108	rfi
109_mmu_on:
110	b _zimage_start_lib
111
112