1/* 2 * Device Tree Source for AMCC Yosemite 3 * 4 * Copyright 2008 IBM Corp. 5 * Josh Boyer <jwboyer@linux.vnet.ibm.com> 6 * 7 * This file is licensed under the terms of the GNU General Public 8 * License version 2. This program is licensed "as is" without 9 * any warranty of any kind, whether express or implied. 10 */ 11 12/dts-v1/; 13 14/ { 15 #address-cells = <2>; 16 #size-cells = <1>; 17 model = "amcc,yosemite"; 18 compatible = "amcc,yosemite"; 19 dcr-parent = <&{/cpus/cpu@0}>; 20 21 aliases { 22 ethernet0 = &EMAC0; 23 ethernet1 = &EMAC1; 24 serial0 = &UART0; 25 serial1 = &UART1; 26 serial2 = &UART2; 27 serial3 = &UART3; 28 }; 29 30 cpus { 31 #address-cells = <1>; 32 #size-cells = <0>; 33 34 cpu@0 { 35 device_type = "cpu"; 36 model = "PowerPC,440EP"; 37 reg = <0x00000000>; 38 clock-frequency = <0>; /* Filled in by zImage */ 39 timebase-frequency = <0>; /* Filled in by zImage */ 40 i-cache-line-size = <32>; 41 d-cache-line-size = <32>; 42 i-cache-size = <32768>; 43 d-cache-size = <32768>; 44 dcr-controller; 45 dcr-access-method = "native"; 46 }; 47 }; 48 49 memory { 50 device_type = "memory"; 51 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ 52 }; 53 54 UIC0: interrupt-controller0 { 55 compatible = "ibm,uic-440ep","ibm,uic"; 56 interrupt-controller; 57 cell-index = <0>; 58 dcr-reg = <0x0c0 0x009>; 59 #address-cells = <0>; 60 #size-cells = <0>; 61 #interrupt-cells = <2>; 62 }; 63 64 UIC1: interrupt-controller1 { 65 compatible = "ibm,uic-440ep","ibm,uic"; 66 interrupt-controller; 67 cell-index = <1>; 68 dcr-reg = <0x0d0 0x009>; 69 #address-cells = <0>; 70 #size-cells = <0>; 71 #interrupt-cells = <2>; 72 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 73 interrupt-parent = <&UIC0>; 74 }; 75 76 SDR0: sdr { 77 compatible = "ibm,sdr-440ep"; 78 dcr-reg = <0x00e 0x002>; 79 }; 80 81 CPR0: cpr { 82 compatible = "ibm,cpr-440ep"; 83 dcr-reg = <0x00c 0x002>; 84 }; 85 86 plb { 87 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; 88 #address-cells = <2>; 89 #size-cells = <1>; 90 ranges; 91 clock-frequency = <0>; /* Filled in by zImage */ 92 93 SDRAM0: sdram { 94 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; 95 dcr-reg = <0x010 0x002>; 96 }; 97 98 DMA0: dma { 99 compatible = "ibm,dma-440ep", "ibm,dma-440gp"; 100 dcr-reg = <0x100 0x027>; 101 }; 102 103 MAL0: mcmal { 104 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; 105 dcr-reg = <0x180 0x062>; 106 num-tx-chans = <4>; 107 num-rx-chans = <2>; 108 interrupt-parent = <&MAL0>; 109 interrupts = <0x0 0x1 0x2 0x3 0x4>; 110 #interrupt-cells = <1>; 111 #address-cells = <0>; 112 #size-cells = <0>; 113 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 114 /*RXEOB*/ 0x1 &UIC0 0xb 0x4 115 /*SERR*/ 0x2 &UIC1 0x0 0x4 116 /*TXDE*/ 0x3 &UIC1 0x1 0x4 117 /*RXDE*/ 0x4 &UIC1 0x2 0x4>; 118 }; 119 120 POB0: opb { 121 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; 122 #address-cells = <1>; 123 #size-cells = <1>; 124 /* Bamboo is oddball in the 44x world and doesn't use the ERPN 125 * bits. 126 */ 127 ranges = <0x00000000 0x00000000 0x00000000 0x80000000 128 0x80000000 0x00000000 0x80000000 0x80000000>; 129 interrupt-parent = <&UIC1>; 130 interrupts = <0x7 0x4>; 131 clock-frequency = <0>; /* Filled in by zImage */ 132 133 EBC0: ebc { 134 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; 135 dcr-reg = <0x012 0x002>; 136 #address-cells = <2>; 137 #size-cells = <1>; 138 clock-frequency = <0>; /* Filled in by zImage */ 139 interrupts = <0x5 0x1>; 140 interrupt-parent = <&UIC1>; 141 }; 142 143 UART0: serial@ef600300 { 144 device_type = "serial"; 145 compatible = "ns16550"; 146 reg = <0xef600300 0x00000008>; 147 virtual-reg = <0xef600300>; 148 clock-frequency = <0>; /* Filled in by zImage */ 149 current-speed = <115200>; 150 interrupt-parent = <&UIC0>; 151 interrupts = <0x0 0x4>; 152 }; 153 154 UART1: serial@ef600400 { 155 device_type = "serial"; 156 compatible = "ns16550"; 157 reg = <0xef600400 0x00000008>; 158 virtual-reg = <0xef600400>; 159 clock-frequency = <0>; 160 current-speed = <0>; 161 interrupt-parent = <&UIC0>; 162 interrupts = <0x1 0x4>; 163 }; 164 165 UART2: serial@ef600500 { 166 device_type = "serial"; 167 compatible = "ns16550"; 168 reg = <0xef600500 0x00000008>; 169 virtual-reg = <0xef600500>; 170 clock-frequency = <0>; 171 current-speed = <0>; 172 interrupt-parent = <&UIC0>; 173 interrupts = <0x3 0x4>; 174 status = "disabled"; 175 }; 176 177 UART3: serial@ef600600 { 178 device_type = "serial"; 179 compatible = "ns16550"; 180 reg = <0xef600600 0x00000008>; 181 virtual-reg = <0xef600600>; 182 clock-frequency = <0>; 183 current-speed = <0>; 184 interrupt-parent = <&UIC0>; 185 interrupts = <0x4 0x4>; 186 status = "disabled"; 187 }; 188 189 IIC0: i2c@ef600700 { 190 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 191 reg = <0xef600700 0x00000014>; 192 interrupt-parent = <&UIC0>; 193 interrupts = <0x2 0x4>; 194 }; 195 196 IIC1: i2c@ef600800 { 197 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 198 reg = <0xef600800 0x00000014>; 199 interrupt-parent = <&UIC0>; 200 interrupts = <0x7 0x4>; 201 }; 202 203 spi@ef600900 { 204 compatible = "amcc,spi-440ep"; 205 reg = <0xef600900 0x00000006>; 206 interrupts = <0x8 0x4>; 207 interrupt-parent = <&UIC0>; 208 }; 209 210 ZMII0: emac-zmii@ef600d00 { 211 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; 212 reg = <0xef600d00 0x0000000c>; 213 }; 214 215 EMAC0: ethernet@ef600e00 { 216 device_type = "network"; 217 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 218 interrupt-parent = <&UIC1>; 219 interrupts = <0x1c 0x4 0x1d 0x4>; 220 reg = <0xef600e00 0x00000070>; 221 local-mac-address = [000000000000]; 222 mal-device = <&MAL0>; 223 mal-tx-channel = <0 1>; 224 mal-rx-channel = <0>; 225 cell-index = <0>; 226 max-frame-size = <1500>; 227 rx-fifo-size = <4096>; 228 tx-fifo-size = <2048>; 229 phy-mode = "rmii"; 230 phy-map = <0x00000000>; 231 zmii-device = <&ZMII0>; 232 zmii-channel = <0>; 233 }; 234 235 EMAC1: ethernet@ef600f00 { 236 device_type = "network"; 237 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 238 interrupt-parent = <&UIC1>; 239 interrupts = <0x1e 0x4 0x1f 0x4>; 240 reg = <0xef600f00 0x00000070>; 241 local-mac-address = [000000000000]; 242 mal-device = <&MAL0>; 243 mal-tx-channel = <2 3>; 244 mal-rx-channel = <1>; 245 cell-index = <1>; 246 max-frame-size = <1500>; 247 rx-fifo-size = <4096>; 248 tx-fifo-size = <2048>; 249 phy-mode = "rmii"; 250 phy-map = <0x00000000>; 251 zmii-device = <&ZMII0>; 252 zmii-channel = <1>; 253 }; 254 255 usb@ef601000 { 256 compatible = "ohci-be"; 257 reg = <0xef601000 0x00000080>; 258 interrupts = <0x8 0x4 0x9 0x4>; 259 interrupt-parent = < &UIC1 >; 260 }; 261 }; 262 263 PCI0: pci@ec000000 { 264 device_type = "pci"; 265 #interrupt-cells = <1>; 266 #size-cells = <2>; 267 #address-cells = <3>; 268 compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; 269 primary; 270 reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ 271 0x00000000 0xeed00000 0x00000004 /* IACK */ 272 0x00000000 0xeed00000 0x00000004 /* Special cycle */ 273 0x00000000 0xef400000 0x00000040>; /* Internal registers */ 274 275 /* Outbound ranges, one memory and one IO, 276 * later cannot be changed. Chip supports a second 277 * IO range but we don't use it for now 278 */ 279 ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 280 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; 281 282 /* Inbound 2GB range starting at 0 */ 283 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; 284 285 interrupt-map-mask = <0xf800 0x0 0x0 0x0>; 286 interrupt-map = < 287 /* IDSEL 12 */ 288 0x6000 0x0 0x0 0x0 &UIC0 0x19 0x8 289 >; 290 }; 291 }; 292 293 chosen { 294 linux,stdout-path = "/plb/opb/serial@ef600300"; 295 }; 296}; 297