1*54c15ec3SPali Rohár// SPDX-License-Identifier: GPL-2.0+ 2*54c15ec3SPali Rohár/* 3*54c15ec3SPali Rohár * Turris 1.x Device Tree Source 4*54c15ec3SPali Rohár * 5*54c15ec3SPali Rohár * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/) 6*54c15ec3SPali Rohár * 7*54c15ec3SPali Rohár * Pinout, Schematics and Altium hardware design files are open source 8*54c15ec3SPali Rohár * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/ 9*54c15ec3SPali Rohár */ 10*54c15ec3SPali Rohár 11*54c15ec3SPali Rohár#include <dt-bindings/gpio/gpio.h> 12*54c15ec3SPali Rohár#include <dt-bindings/interrupt-controller/irq.h> 13*54c15ec3SPali Rohár#include <dt-bindings/leds/common.h> 14*54c15ec3SPali Rohár/include/ "fsl/p2020si-pre.dtsi" 15*54c15ec3SPali Rohár 16*54c15ec3SPali Rohár/ { 17*54c15ec3SPali Rohár model = "Turris 1.x"; 18*54c15ec3SPali Rohár compatible = "cznic,turris1x", "fsl,P2020RDB-PC"; /* fsl,P2020RDB-PC is required for booting Linux */ 19*54c15ec3SPali Rohár 20*54c15ec3SPali Rohár aliases { 21*54c15ec3SPali Rohár ethernet0 = &enet0; 22*54c15ec3SPali Rohár ethernet1 = &enet1; 23*54c15ec3SPali Rohár ethernet2 = &enet2; 24*54c15ec3SPali Rohár serial0 = &serial0; 25*54c15ec3SPali Rohár serial1 = &serial1; 26*54c15ec3SPali Rohár pci0 = &pci0; 27*54c15ec3SPali Rohár pci1 = &pci1; 28*54c15ec3SPali Rohár pci2 = &pci2; 29*54c15ec3SPali Rohár spi0 = &spi0; 30*54c15ec3SPali Rohár }; 31*54c15ec3SPali Rohár 32*54c15ec3SPali Rohár memory { 33*54c15ec3SPali Rohár device_type = "memory"; 34*54c15ec3SPali Rohár }; 35*54c15ec3SPali Rohár 36*54c15ec3SPali Rohár soc: soc@ffe00000 { 37*54c15ec3SPali Rohár ranges = <0x0 0x0 0xffe00000 0x00100000>; 38*54c15ec3SPali Rohár 39*54c15ec3SPali Rohár i2c@3000 { 40*54c15ec3SPali Rohár /* PCA9557PW GPIO controller for boot config */ 41*54c15ec3SPali Rohár gpio-controller@18 { 42*54c15ec3SPali Rohár compatible = "nxp,pca9557"; 43*54c15ec3SPali Rohár label = "bootcfg"; 44*54c15ec3SPali Rohár reg = <0x18>; 45*54c15ec3SPali Rohár #gpio-cells = <2>; 46*54c15ec3SPali Rohár gpio-controller; 47*54c15ec3SPali Rohár polarity = <0x00>; 48*54c15ec3SPali Rohár }; 49*54c15ec3SPali Rohár 50*54c15ec3SPali Rohár /* STM32F030R8T6 MCU for power control */ 51*54c15ec3SPali Rohár power-control@2a { 52*54c15ec3SPali Rohár /* 53*54c15ec3SPali Rohár * Turris Power Control firmware runs on STM32F0 MCU. 54*54c15ec3SPali Rohár * This firmware is open source and available at: 55*54c15ec3SPali Rohár * https://gitlab.nic.cz/turris/hw/turris_power_control 56*54c15ec3SPali Rohár */ 57*54c15ec3SPali Rohár reg = <0x2a>; 58*54c15ec3SPali Rohár }; 59*54c15ec3SPali Rohár 60*54c15ec3SPali Rohár /* DDR3 SPD/EEPROM PSWP instruction */ 61*54c15ec3SPali Rohár eeprom@32 { 62*54c15ec3SPali Rohár reg = <0x32>; 63*54c15ec3SPali Rohár }; 64*54c15ec3SPali Rohár 65*54c15ec3SPali Rohár /* SA56004ED temperature control */ 66*54c15ec3SPali Rohár temperature-sensor@4c { 67*54c15ec3SPali Rohár compatible = "nxp,sa56004"; 68*54c15ec3SPali Rohár reg = <0x4c>; 69*54c15ec3SPali Rohár interrupt-parent = <&gpio>; 70*54c15ec3SPali Rohár interrupts = <12 IRQ_TYPE_LEVEL_LOW>, /* GPIO12 - ALERT pin */ 71*54c15ec3SPali Rohár <13 IRQ_TYPE_LEVEL_LOW>; /* GPIO13 - CRIT pin */ 72*54c15ec3SPali Rohár }; 73*54c15ec3SPali Rohár 74*54c15ec3SPali Rohár /* DDR3 SPD/EEPROM */ 75*54c15ec3SPali Rohár eeprom@52 { 76*54c15ec3SPali Rohár compatible = "atmel,spd"; 77*54c15ec3SPali Rohár reg = <0x52>; 78*54c15ec3SPali Rohár }; 79*54c15ec3SPali Rohár 80*54c15ec3SPali Rohár /* MCP79402-I/ST Protected EEPROM */ 81*54c15ec3SPali Rohár eeprom@57 { 82*54c15ec3SPali Rohár reg = <0x57>; 83*54c15ec3SPali Rohár }; 84*54c15ec3SPali Rohár 85*54c15ec3SPali Rohár /* ATSHA204-TH-DA-T crypto module */ 86*54c15ec3SPali Rohár crypto@64 { 87*54c15ec3SPali Rohár compatible = "atmel,atsha204"; 88*54c15ec3SPali Rohár reg = <0x64>; 89*54c15ec3SPali Rohár }; 90*54c15ec3SPali Rohár 91*54c15ec3SPali Rohár /* IDT6V49205BNLGI clock generator */ 92*54c15ec3SPali Rohár clock-generator@69 { 93*54c15ec3SPali Rohár compatible = "idt,6v49205b"; 94*54c15ec3SPali Rohár reg = <0x69>; 95*54c15ec3SPali Rohár }; 96*54c15ec3SPali Rohár 97*54c15ec3SPali Rohár /* MCP79402-I/ST RTC */ 98*54c15ec3SPali Rohár rtc@6f { 99*54c15ec3SPali Rohár compatible = "microchip,mcp7940x"; 100*54c15ec3SPali Rohár reg = <0x6f>; 101*54c15ec3SPali Rohár interrupt-parent = <&gpio>; 102*54c15ec3SPali Rohár interrupts = <14 0>; /* GPIO14 - MFP pin */ 103*54c15ec3SPali Rohár }; 104*54c15ec3SPali Rohár }; 105*54c15ec3SPali Rohár 106*54c15ec3SPali Rohár /* SPI on connector P1 */ 107*54c15ec3SPali Rohár spi0: spi@7000 { 108*54c15ec3SPali Rohár }; 109*54c15ec3SPali Rohár 110*54c15ec3SPali Rohár gpio: gpio-controller@fc00 { 111*54c15ec3SPali Rohár #interrupt-cells = <2>; 112*54c15ec3SPali Rohár interrupt-controller; 113*54c15ec3SPali Rohár }; 114*54c15ec3SPali Rohár 115*54c15ec3SPali Rohár /* Connected to SMSC USB2412-DZK 2-Port USB 2.0 Hub Controller */ 116*54c15ec3SPali Rohár usb@22000 { 117*54c15ec3SPali Rohár phy_type = "ulpi"; 118*54c15ec3SPali Rohár dr_mode = "host"; 119*54c15ec3SPali Rohár }; 120*54c15ec3SPali Rohár 121*54c15ec3SPali Rohár enet0: ethernet@24000 { 122*54c15ec3SPali Rohár /* Connected to port 6 of QCA8337N-AL3C switch */ 123*54c15ec3SPali Rohár phy-connection-type = "rgmii-id"; 124*54c15ec3SPali Rohár 125*54c15ec3SPali Rohár fixed-link { 126*54c15ec3SPali Rohár speed = <1000>; 127*54c15ec3SPali Rohár full-duplex; 128*54c15ec3SPali Rohár }; 129*54c15ec3SPali Rohár }; 130*54c15ec3SPali Rohár 131*54c15ec3SPali Rohár mdio@24520 { 132*54c15ec3SPali Rohár /* KSZ9031RNXCA ethernet phy for WAN port */ 133*54c15ec3SPali Rohár phy: ethernet-phy@7 { 134*54c15ec3SPali Rohár interrupts = <3 1 0 0>; 135*54c15ec3SPali Rohár reg = <0x7>; 136*54c15ec3SPali Rohár }; 137*54c15ec3SPali Rohár 138*54c15ec3SPali Rohár /* QCA8337N-AL3C switch with integrated ethernet PHYs for LAN ports */ 139*54c15ec3SPali Rohár switch@10 { 140*54c15ec3SPali Rohár compatible = "qca,qca8337"; 141*54c15ec3SPali Rohár interrupts = <2 1 0 0>; 142*54c15ec3SPali Rohár reg = <0x10>; 143*54c15ec3SPali Rohár 144*54c15ec3SPali Rohár ports { 145*54c15ec3SPali Rohár #address-cells = <1>; 146*54c15ec3SPali Rohár #size-cells = <0>; 147*54c15ec3SPali Rohár 148*54c15ec3SPali Rohár port@0 { 149*54c15ec3SPali Rohár reg = <0>; 150*54c15ec3SPali Rohár label = "cpu1"; 151*54c15ec3SPali Rohár ethernet = <&enet1>; 152*54c15ec3SPali Rohár phy-mode = "rgmii-id"; 153*54c15ec3SPali Rohár 154*54c15ec3SPali Rohár fixed-link { 155*54c15ec3SPali Rohár speed = <1000>; 156*54c15ec3SPali Rohár full-duplex; 157*54c15ec3SPali Rohár }; 158*54c15ec3SPali Rohár }; 159*54c15ec3SPali Rohár 160*54c15ec3SPali Rohár port@1 { 161*54c15ec3SPali Rohár reg = <1>; 162*54c15ec3SPali Rohár label = "lan5"; 163*54c15ec3SPali Rohár }; 164*54c15ec3SPali Rohár 165*54c15ec3SPali Rohár port@2 { 166*54c15ec3SPali Rohár reg = <2>; 167*54c15ec3SPali Rohár label = "lan4"; 168*54c15ec3SPali Rohár }; 169*54c15ec3SPali Rohár 170*54c15ec3SPali Rohár port@3 { 171*54c15ec3SPali Rohár reg = <3>; 172*54c15ec3SPali Rohár label = "lan3"; 173*54c15ec3SPali Rohár }; 174*54c15ec3SPali Rohár 175*54c15ec3SPali Rohár port@4 { 176*54c15ec3SPali Rohár reg = <4>; 177*54c15ec3SPali Rohár label = "lan2"; 178*54c15ec3SPali Rohár }; 179*54c15ec3SPali Rohár 180*54c15ec3SPali Rohár port@5 { 181*54c15ec3SPali Rohár reg = <5>; 182*54c15ec3SPali Rohár label = "lan1"; 183*54c15ec3SPali Rohár }; 184*54c15ec3SPali Rohár 185*54c15ec3SPali Rohár port@6 { 186*54c15ec3SPali Rohár reg = <6>; 187*54c15ec3SPali Rohár label = "cpu0"; 188*54c15ec3SPali Rohár ethernet = <&enet0>; 189*54c15ec3SPali Rohár phy-mode = "rgmii-id"; 190*54c15ec3SPali Rohár 191*54c15ec3SPali Rohár fixed-link { 192*54c15ec3SPali Rohár speed = <1000>; 193*54c15ec3SPali Rohár full-duplex; 194*54c15ec3SPali Rohár }; 195*54c15ec3SPali Rohár }; 196*54c15ec3SPali Rohár }; 197*54c15ec3SPali Rohár }; 198*54c15ec3SPali Rohár }; 199*54c15ec3SPali Rohár 200*54c15ec3SPali Rohár ptp_clock@24e00 { 201*54c15ec3SPali Rohár fsl,tclk-period = <5>; 202*54c15ec3SPali Rohár fsl,tmr-prsc = <200>; 203*54c15ec3SPali Rohár fsl,tmr-add = <0xcccccccd>; 204*54c15ec3SPali Rohár fsl,tmr-fiper1 = <0x3b9ac9fb>; 205*54c15ec3SPali Rohár fsl,tmr-fiper2 = <0x0001869b>; 206*54c15ec3SPali Rohár fsl,max-adj = <249999999>; 207*54c15ec3SPali Rohár }; 208*54c15ec3SPali Rohár 209*54c15ec3SPali Rohár enet1: ethernet@25000 { 210*54c15ec3SPali Rohár /* Connected to port 0 of QCA8337N-AL3C switch */ 211*54c15ec3SPali Rohár phy-connection-type = "rgmii-id"; 212*54c15ec3SPali Rohár 213*54c15ec3SPali Rohár fixed-link { 214*54c15ec3SPali Rohár speed = <1000>; 215*54c15ec3SPali Rohár full-duplex; 216*54c15ec3SPali Rohár }; 217*54c15ec3SPali Rohár }; 218*54c15ec3SPali Rohár 219*54c15ec3SPali Rohár mdio@25520 { 220*54c15ec3SPali Rohár status = "disabled"; 221*54c15ec3SPali Rohár }; 222*54c15ec3SPali Rohár 223*54c15ec3SPali Rohár enet2: ethernet@26000 { 224*54c15ec3SPali Rohár /* Connected to KSZ9031RNXCA ethernet phy (WAN port) */ 225*54c15ec3SPali Rohár label = "wan"; 226*54c15ec3SPali Rohár phy-handle = <&phy>; 227*54c15ec3SPali Rohár phy-connection-type = "rgmii-id"; 228*54c15ec3SPali Rohár }; 229*54c15ec3SPali Rohár 230*54c15ec3SPali Rohár mdio@26520 { 231*54c15ec3SPali Rohár status = "disabled"; 232*54c15ec3SPali Rohár }; 233*54c15ec3SPali Rohár 234*54c15ec3SPali Rohár sdhc@2e000 { 235*54c15ec3SPali Rohár bus-width = <4>; 236*54c15ec3SPali Rohár cd-gpios = <&gpio 8 GPIO_ACTIVE_LOW>; 237*54c15ec3SPali Rohár }; 238*54c15ec3SPali Rohár }; 239*54c15ec3SPali Rohár 240*54c15ec3SPali Rohár lbc: localbus@ffe05000 { 241*54c15ec3SPali Rohár reg = <0 0xffe05000 0 0x1000>; 242*54c15ec3SPali Rohár 243*54c15ec3SPali Rohár ranges = <0x0 0x0 0x0 0xef000000 0x01000000>, /* NOR */ 244*54c15ec3SPali Rohár <0x1 0x0 0x0 0xff800000 0x00040000>, /* NAND */ 245*54c15ec3SPali Rohár <0x3 0x0 0x0 0xffa00000 0x00020000>; /* CPLD */ 246*54c15ec3SPali Rohár 247*54c15ec3SPali Rohár /* S29GL128P90TFIR10 NOR */ 248*54c15ec3SPali Rohár nor@0,0 { 249*54c15ec3SPali Rohár compatible = "cfi-flash"; 250*54c15ec3SPali Rohár reg = <0x0 0x0 0x01000000>; 251*54c15ec3SPali Rohár bank-width = <2>; 252*54c15ec3SPali Rohár device-width = <1>; 253*54c15ec3SPali Rohár 254*54c15ec3SPali Rohár partitions { 255*54c15ec3SPali Rohár compatible = "fixed-partitions"; 256*54c15ec3SPali Rohár #address-cells = <1>; 257*54c15ec3SPali Rohár #size-cells = <1>; 258*54c15ec3SPali Rohár 259*54c15ec3SPali Rohár partition@0 { 260*54c15ec3SPali Rohár /* 128 kB for Device Tree Blob */ 261*54c15ec3SPali Rohár reg = <0x00000000 0x00020000>; 262*54c15ec3SPali Rohár label = "dtb"; 263*54c15ec3SPali Rohár }; 264*54c15ec3SPali Rohár 265*54c15ec3SPali Rohár partition@20000 { 266*54c15ec3SPali Rohár /* 1.7 MB for Rescue Linux Kernel Image */ 267*54c15ec3SPali Rohár reg = <0x00020000 0x001a0000>; 268*54c15ec3SPali Rohár label = "rescue-kernel"; 269*54c15ec3SPali Rohár }; 270*54c15ec3SPali Rohár 271*54c15ec3SPali Rohár partition@1c0000 { 272*54c15ec3SPali Rohár /* 1.5 MB for Rescue JFFS2 Root File System */ 273*54c15ec3SPali Rohár reg = <0x001c0000 0x00180000>; 274*54c15ec3SPali Rohár label = "rescue-rootfs"; 275*54c15ec3SPali Rohár }; 276*54c15ec3SPali Rohár 277*54c15ec3SPali Rohár partition@340000 { 278*54c15ec3SPali Rohár /* 11 MB for TAR.XZ Backup with content of NAND Root File System */ 279*54c15ec3SPali Rohár reg = <0x00340000 0x00b00000>; 280*54c15ec3SPali Rohár label = "backup-rootfs"; 281*54c15ec3SPali Rohár }; 282*54c15ec3SPali Rohár 283*54c15ec3SPali Rohár partition@e40000 { 284*54c15ec3SPali Rohár /* 768 kB for Certificates JFFS2 File System */ 285*54c15ec3SPali Rohár reg = <0x00e40000 0x000c0000>; 286*54c15ec3SPali Rohár label = "certificates"; 287*54c15ec3SPali Rohár }; 288*54c15ec3SPali Rohár 289*54c15ec3SPali Rohár /* free unused space 0x00f00000-0x00f20000 */ 290*54c15ec3SPali Rohár 291*54c15ec3SPali Rohár partition@f20000 { 292*54c15ec3SPali Rohár /* 128 kB for U-Boot Environment Variables */ 293*54c15ec3SPali Rohár reg = <0x00f20000 0x00020000>; 294*54c15ec3SPali Rohár label = "u-boot-env"; 295*54c15ec3SPali Rohár }; 296*54c15ec3SPali Rohár 297*54c15ec3SPali Rohár partition@f40000 { 298*54c15ec3SPali Rohár /* 768 kB for U-Boot Bootloader Image */ 299*54c15ec3SPali Rohár reg = <0x00f40000 0x000c0000>; 300*54c15ec3SPali Rohár label = "u-boot"; 301*54c15ec3SPali Rohár }; 302*54c15ec3SPali Rohár }; 303*54c15ec3SPali Rohár }; 304*54c15ec3SPali Rohár 305*54c15ec3SPali Rohár /* MT29F2G08ABAEAWP:E NAND */ 306*54c15ec3SPali Rohár nand@1,0 { 307*54c15ec3SPali Rohár compatible = "fsl,p2020-fcm-nand", "fsl,elbc-fcm-nand"; 308*54c15ec3SPali Rohár reg = <0x1 0x0 0x00040000>; 309*54c15ec3SPali Rohár nand-ecc-mode = "soft"; 310*54c15ec3SPali Rohár nand-ecc-algo = "bch"; 311*54c15ec3SPali Rohár 312*54c15ec3SPali Rohár partitions { 313*54c15ec3SPali Rohár compatible = "fixed-partitions"; 314*54c15ec3SPali Rohár #address-cells = <1>; 315*54c15ec3SPali Rohár #size-cells = <1>; 316*54c15ec3SPali Rohár 317*54c15ec3SPali Rohár partition@0 { 318*54c15ec3SPali Rohár /* 256 MB for UBI with one volume: UBIFS Root File System */ 319*54c15ec3SPali Rohár reg = <0x00000000 0x10000000>; 320*54c15ec3SPali Rohár label = "rootfs"; 321*54c15ec3SPali Rohár }; 322*54c15ec3SPali Rohár }; 323*54c15ec3SPali Rohár }; 324*54c15ec3SPali Rohár 325*54c15ec3SPali Rohár /* LCMXO1200C-3FTN256C FPGA */ 326*54c15ec3SPali Rohár cpld@3,0 { 327*54c15ec3SPali Rohár /* 328*54c15ec3SPali Rohár * Turris CPLD firmware which runs on this Lattice FPGA, 329*54c15ec3SPali Rohár * is extended version of P1021RDB-PC CPLD v4.1 firmware. 330*54c15ec3SPali Rohár * It is backward compatible with its original version 331*54c15ec3SPali Rohár * and the only extension is support for Turris LEDs. 332*54c15ec3SPali Rohár * Turris CPLD firmware is open source and available at: 333*54c15ec3SPali Rohár * https://gitlab.nic.cz/turris/hw/turris_cpld/-/blob/master/CZ_NIC_Router_CPLD.v 334*54c15ec3SPali Rohár */ 335*54c15ec3SPali Rohár compatible = "cznic,turris1x-cpld", "fsl,p1021rdb-pc-cpld", "simple-bus"; 336*54c15ec3SPali Rohár reg = <0x3 0x0 0x30>; 337*54c15ec3SPali Rohár #address-cells = <1>; 338*54c15ec3SPali Rohár #size-cells = <1>; 339*54c15ec3SPali Rohár ranges = <0x0 0x3 0x0 0x00020000>; 340*54c15ec3SPali Rohár 341*54c15ec3SPali Rohár /* MAX6370KA+T watchdog */ 342*54c15ec3SPali Rohár watchdog@2 { 343*54c15ec3SPali Rohár /* 344*54c15ec3SPali Rohár * CPLD firmware maps SET0, SET1 and SET2 345*54c15ec3SPali Rohár * input logic of MAX6370KA+T chip to CPLD 346*54c15ec3SPali Rohár * memory space at byte offset 0x2. WDI 347*54c15ec3SPali Rohár * input logic is outside of the CPLD and 348*54c15ec3SPali Rohár * connected via external GPIO. 349*54c15ec3SPali Rohár */ 350*54c15ec3SPali Rohár compatible = "maxim,max6370"; 351*54c15ec3SPali Rohár reg = <0x02 0x01>; 352*54c15ec3SPali Rohár gpios = <&gpio 11 GPIO_ACTIVE_LOW>; 353*54c15ec3SPali Rohár }; 354*54c15ec3SPali Rohár 355*54c15ec3SPali Rohár led-controller@13 { 356*54c15ec3SPali Rohár /* 357*54c15ec3SPali Rohár * LEDs are controlled by CPLD firmware. 358*54c15ec3SPali Rohár * All five LAN LEDs share common RGB settings 359*54c15ec3SPali Rohár * and so it is not possible to set different 360*54c15ec3SPali Rohár * colors on different LAN ports. 361*54c15ec3SPali Rohár */ 362*54c15ec3SPali Rohár compatible = "cznic,turris1x-leds"; 363*54c15ec3SPali Rohár reg = <0x13 0x1d>; 364*54c15ec3SPali Rohár #address-cells = <1>; 365*54c15ec3SPali Rohár #size-cells = <0>; 366*54c15ec3SPali Rohár 367*54c15ec3SPali Rohár multi-led@0 { 368*54c15ec3SPali Rohár reg = <0x0>; 369*54c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 370*54c15ec3SPali Rohár function = LED_FUNCTION_WAN; 371*54c15ec3SPali Rohár }; 372*54c15ec3SPali Rohár 373*54c15ec3SPali Rohár multi-led@1 { 374*54c15ec3SPali Rohár reg = <0x1>; 375*54c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 376*54c15ec3SPali Rohár function = LED_FUNCTION_LAN; 377*54c15ec3SPali Rohár function-enumerator = <5>; 378*54c15ec3SPali Rohár }; 379*54c15ec3SPali Rohár 380*54c15ec3SPali Rohár multi-led@2 { 381*54c15ec3SPali Rohár reg = <0x2>; 382*54c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 383*54c15ec3SPali Rohár function = LED_FUNCTION_LAN; 384*54c15ec3SPali Rohár function-enumerator = <4>; 385*54c15ec3SPali Rohár }; 386*54c15ec3SPali Rohár 387*54c15ec3SPali Rohár multi-led@3 { 388*54c15ec3SPali Rohár reg = <0x3>; 389*54c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 390*54c15ec3SPali Rohár function = LED_FUNCTION_LAN; 391*54c15ec3SPali Rohár function-enumerator = <3>; 392*54c15ec3SPali Rohár }; 393*54c15ec3SPali Rohár 394*54c15ec3SPali Rohár multi-led@4 { 395*54c15ec3SPali Rohár reg = <0x4>; 396*54c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 397*54c15ec3SPali Rohár function = LED_FUNCTION_LAN; 398*54c15ec3SPali Rohár function-enumerator = <2>; 399*54c15ec3SPali Rohár }; 400*54c15ec3SPali Rohár 401*54c15ec3SPali Rohár multi-led@5 { 402*54c15ec3SPali Rohár reg = <0x5>; 403*54c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 404*54c15ec3SPali Rohár function = LED_FUNCTION_LAN; 405*54c15ec3SPali Rohár function-enumerator = <1>; 406*54c15ec3SPali Rohár }; 407*54c15ec3SPali Rohár 408*54c15ec3SPali Rohár multi-led@6 { 409*54c15ec3SPali Rohár reg = <0x6>; 410*54c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 411*54c15ec3SPali Rohár function = LED_FUNCTION_WLAN; 412*54c15ec3SPali Rohár }; 413*54c15ec3SPali Rohár 414*54c15ec3SPali Rohár multi-led@7 { 415*54c15ec3SPali Rohár reg = <0x7>; 416*54c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 417*54c15ec3SPali Rohár function = LED_FUNCTION_POWER; 418*54c15ec3SPali Rohár }; 419*54c15ec3SPali Rohár }; 420*54c15ec3SPali Rohár }; 421*54c15ec3SPali Rohár }; 422*54c15ec3SPali Rohár 423*54c15ec3SPali Rohár pci2: pcie@ffe08000 { 424*54c15ec3SPali Rohár /* 425*54c15ec3SPali Rohár * PCIe bus for on-board TUSB7340RKM USB 3.0 xHCI controller. 426*54c15ec3SPali Rohár * This xHCI controller is available only on Turris 1.1 boards. 427*54c15ec3SPali Rohár * Turris 1.0 boards have nothing connected to this PCIe bus, 428*54c15ec3SPali Rohár * so system would see only PCIe Root Port of this PCIe Root 429*54c15ec3SPali Rohár * Complex. TUSB7340RKM xHCI controller has four SuperSpeed 430*54c15ec3SPali Rohár * channels. Channel 0 is connected to the front USB 3.0 port, 431*54c15ec3SPali Rohár * channel 1 (but only USB 2.0 subset) to USB 2.0 pins on mPCIe 432*54c15ec3SPali Rohár * slot 1 (CN5), channels 2 and 3 to connector P600. 433*54c15ec3SPali Rohár * 434*54c15ec3SPali Rohár * P2020 PCIe Root Port uses 1MB of PCIe MEM and xHCI controller 435*54c15ec3SPali Rohár * uses 64kB + 8kB of PCIe MEM. No PCIe IO is used or required. 436*54c15ec3SPali Rohár * So allocate 2MB of PCIe MEM for this PCIe bus. 437*54c15ec3SPali Rohár */ 438*54c15ec3SPali Rohár reg = <0 0xffe08000 0 0x1000>; 439*54c15ec3SPali Rohár ranges = <0x02000000 0x0 0xc0000000 0 0xc0000000 0x0 0x00200000>, /* MEM */ 440*54c15ec3SPali Rohár <0x01000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>; /* IO */ 441*54c15ec3SPali Rohár 442*54c15ec3SPali Rohár pcie@0 { 443*54c15ec3SPali Rohár ranges; 444*54c15ec3SPali Rohár }; 445*54c15ec3SPali Rohár }; 446*54c15ec3SPali Rohár 447*54c15ec3SPali Rohár pci1: pcie@ffe09000 { 448*54c15ec3SPali Rohár /* PCIe bus on mPCIe slot 2 (CN6) for expansion mPCIe card */ 449*54c15ec3SPali Rohár reg = <0 0xffe09000 0 0x1000>; 450*54c15ec3SPali Rohár ranges = <0x02000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>, /* MEM */ 451*54c15ec3SPali Rohár <0x01000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>; /* IO */ 452*54c15ec3SPali Rohár 453*54c15ec3SPali Rohár pcie@0 { 454*54c15ec3SPali Rohár ranges; 455*54c15ec3SPali Rohár }; 456*54c15ec3SPali Rohár }; 457*54c15ec3SPali Rohár 458*54c15ec3SPali Rohár pci0: pcie@ffe0a000 { 459*54c15ec3SPali Rohár /* 460*54c15ec3SPali Rohár * PCIe bus on mPCIe slot 1 (CN5) for expansion mPCIe card. 461*54c15ec3SPali Rohár * Turris 1.1 boards have in this mPCIe slot additional USB 2.0 462*54c15ec3SPali Rohár * pins via channel 1 of TUSB7340RKM xHCI controller and also 463*54c15ec3SPali Rohár * additional SIM card slot, both for USB-based WWAN cards. 464*54c15ec3SPali Rohár */ 465*54c15ec3SPali Rohár reg = <0 0xffe0a000 0 0x1000>; 466*54c15ec3SPali Rohár ranges = <0x02000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>, /* MEM */ 467*54c15ec3SPali Rohár <0x01000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>; /* IO */ 468*54c15ec3SPali Rohár 469*54c15ec3SPali Rohár pcie@0 { 470*54c15ec3SPali Rohár ranges; 471*54c15ec3SPali Rohár }; 472*54c15ec3SPali Rohár }; 473*54c15ec3SPali Rohár}; 474*54c15ec3SPali Rohár 475*54c15ec3SPali Rohár/include/ "fsl/p2020si-post.dtsi" 476