xref: /openbmc/linux/arch/powerpc/boot/dts/tqm8560.dts (revision 22246614)
1/*
2 * TQM 8560 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute  it and/or modify it
7 * under  the terms of  the GNU General  Public License as published by the
8 * Free Software Foundation;  either version 2 of the  License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15	model = "tqm,8560";
16	compatible = "tqm,8560", "tqm,85xx";
17	#address-cells = <1>;
18	#size-cells = <1>;
19
20	aliases {
21		ethernet0 = &enet0;
22		ethernet1 = &enet1;
23		ethernet2 = &enet2;
24		serial0 = &serial0;
25		serial1 = &serial1;
26		pci0 = &pci0;
27	};
28
29	cpus {
30		#address-cells = <1>;
31		#size-cells = <0>;
32
33		PowerPC,8560@0 {
34			device_type = "cpu";
35			reg = <0>;
36			d-cache-line-size = <32>;
37			i-cache-line-size = <32>;
38			d-cache-size = <32768>;
39			i-cache-size = <32768>;
40			timebase-frequency = <0>;
41			bus-frequency = <0>;
42			clock-frequency = <0>;
43		};
44	};
45
46	memory {
47		device_type = "memory";
48		reg = <0x00000000 0x10000000>;
49	};
50
51	soc@e0000000 {
52		#address-cells = <1>;
53		#size-cells = <1>;
54		device_type = "soc";
55		ranges = <0x0 0xe0000000 0x100000>;
56		reg = <0xe0000000 0x200>;
57		bus-frequency = <0>;
58		compatible = "fsl,mpc8560-immr", "simple-bus";
59
60		memory-controller@2000 {
61			compatible = "fsl,8540-memory-controller";
62			reg = <0x2000 0x1000>;
63			interrupt-parent = <&mpic>;
64			interrupts = <18 2>;
65		};
66
67		l2-cache-controller@20000 {
68			compatible = "fsl,8540-l2-cache-controller";
69			reg = <0x20000 0x1000>;
70			cache-line-size = <32>;
71			cache-size = <0x40000>;	// L2, 256K
72			interrupt-parent = <&mpic>;
73			interrupts = <16 2>;
74		};
75
76		i2c@3000 {
77			#address-cells = <1>;
78			#size-cells = <0>;
79			cell-index = <0>;
80			compatible = "fsl-i2c";
81			reg = <0x3000 0x100>;
82			interrupts = <43 2>;
83			interrupt-parent = <&mpic>;
84			dfsrr;
85
86			rtc@68 {
87				compatible = "dallas,ds1337";
88				reg = <0x68>;
89			};
90		};
91
92		mdio@24520 {
93			#address-cells = <1>;
94			#size-cells = <0>;
95			compatible = "fsl,gianfar-mdio";
96			reg = <0x24520 0x20>;
97
98			phy1: ethernet-phy@1 {
99				interrupt-parent = <&mpic>;
100				interrupts = <8 1>;
101				reg = <1>;
102				device_type = "ethernet-phy";
103			};
104			phy2: ethernet-phy@2 {
105				interrupt-parent = <&mpic>;
106				interrupts = <8 1>;
107				reg = <2>;
108				device_type = "ethernet-phy";
109			};
110			phy3: ethernet-phy@3 {
111				interrupt-parent = <&mpic>;
112				interrupts = <8 1>;
113				reg = <3>;
114				device_type = "ethernet-phy";
115			};
116		};
117
118		enet0: ethernet@24000 {
119			cell-index = <0>;
120			device_type = "network";
121			model = "TSEC";
122			compatible = "gianfar";
123			reg = <0x24000 0x1000>;
124			local-mac-address = [ 00 00 00 00 00 00 ];
125			interrupts = <29 2 30 2 34 2>;
126			interrupt-parent = <&mpic>;
127			phy-handle = <&phy2>;
128		};
129
130		enet1: ethernet@25000 {
131			cell-index = <1>;
132			device_type = "network";
133			model = "TSEC";
134			compatible = "gianfar";
135			reg = <0x25000 0x1000>;
136			local-mac-address = [ 00 00 00 00 00 00 ];
137			interrupts = <35 2 36 2 40 2>;
138			interrupt-parent = <&mpic>;
139			phy-handle = <&phy1>;
140		};
141
142		mpic: pic@40000 {
143			interrupt-controller;
144			#address-cells = <0>;
145			#interrupt-cells = <2>;
146			reg = <0x40000 0x40000>;
147			device_type = "open-pic";
148		};
149
150		cpm@919c0 {
151			#address-cells = <1>;
152			#size-cells = <1>;
153			compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
154			reg = <0x919c0 0x30>;
155			ranges;
156
157			muram@80000 {
158				#address-cells = <1>;
159				#size-cells = <1>;
160				ranges = <0 0x80000 0x10000>;
161
162				data@0 {
163					compatible = "fsl,cpm-muram-data";
164					reg = <0 0x4000 0x9000 0x2000>;
165				};
166			};
167
168			brg@919f0 {
169				compatible = "fsl,mpc8560-brg",
170				             "fsl,cpm2-brg",
171				             "fsl,cpm-brg";
172				reg = <0x919f0 0x10 0x915f0 0x10>;
173				clock-frequency = <0>;
174			};
175
176			cpmpic: pic@90c00 {
177				interrupt-controller;
178				#address-cells = <0>;
179				#interrupt-cells = <2>;
180				interrupts = <46 2>;
181				interrupt-parent = <&mpic>;
182				reg = <0x90c00 0x80>;
183				compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
184			};
185
186			serial0: serial@91a00 {
187				device_type = "serial";
188				compatible = "fsl,mpc8560-scc-uart",
189				             "fsl,cpm2-scc-uart";
190				reg = <0x91a00 0x20 0x88000 0x100>;
191				fsl,cpm-brg = <1>;
192				fsl,cpm-command = <0x800000>;
193				current-speed = <115200>;
194				interrupts = <40 8>;
195				interrupt-parent = <&cpmpic>;
196			};
197
198			serial1: serial@91a20 {
199				device_type = "serial";
200				compatible = "fsl,mpc8560-scc-uart",
201				             "fsl,cpm2-scc-uart";
202				reg = <0x91a20 0x20 0x88100 0x100>;
203				fsl,cpm-brg = <2>;
204				fsl,cpm-command = <0x4a00000>;
205				current-speed = <115200>;
206				interrupts = <41 8>;
207				interrupt-parent = <&cpmpic>;
208			};
209
210			enet2: ethernet@91340 {
211				device_type = "network";
212				compatible = "fsl,mpc8560-fcc-enet",
213				             "fsl,cpm2-fcc-enet";
214				reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
215				local-mac-address = [ 00 00 00 00 00 00 ];
216				fsl,cpm-command = <0x1a400300>;
217				interrupts = <34 8>;
218				interrupt-parent = <&cpmpic>;
219				phy-handle = <&phy3>;
220			};
221		};
222	};
223
224	pci0: pci@e0008000 {
225		cell-index = <0>;
226		#interrupt-cells = <1>;
227		#size-cells = <2>;
228		#address-cells = <3>;
229		compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
230		device_type = "pci";
231		reg = <0xe0008000 0x1000>;
232		clock-frequency = <66666666>;
233		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
234		interrupt-map = <
235				/* IDSEL 28 */
236				 0xe000 0 0 1 &mpic 2 1
237				 0xe000 0 0 2 &mpic 3 1>;
238
239		interrupt-parent = <&mpic>;
240		interrupts = <24 2>;
241		bus-range = <0 0>;
242		ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
243			  0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
244	};
245};
246