1/* 2 * STX GP3 - 8560 ADS Device Tree Source 3 * 4 * Copyright 2008 Freescale Semiconductor Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12/dts-v1/; 13 14/ { 15 model = "stx,gp3"; 16 compatible = "stx,gp3-8560", "stx,gp3"; 17 #address-cells = <1>; 18 #size-cells = <1>; 19 20 aliases { 21 ethernet0 = &enet0; 22 ethernet1 = &enet1; 23 serial0 = &serial0; 24 pci0 = &pci0; 25 }; 26 27 cpus { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 31 PowerPC,8560@0 { 32 device_type = "cpu"; 33 reg = <0>; 34 d-cache-line-size = <32>; 35 i-cache-line-size = <32>; 36 d-cache-size = <32768>; 37 i-cache-size = <32768>; 38 timebase-frequency = <0>; 39 bus-frequency = <0>; 40 clock-frequency = <0>; 41 next-level-cache = <&L2>; 42 }; 43 }; 44 45 memory { 46 device_type = "memory"; 47 reg = <0x00000000 0x10000000>; 48 }; 49 50 soc@fdf00000 { 51 #address-cells = <1>; 52 #size-cells = <1>; 53 device_type = "soc"; 54 ranges = <0 0xfdf00000 0x100000>; 55 reg = <0xfdf00000 0x1000>; 56 bus-frequency = <0>; 57 compatible = "fsl,mpc8560-immr", "simple-bus"; 58 59 memory-controller@2000 { 60 compatible = "fsl,8540-memory-controller"; 61 reg = <0x2000 0x1000>; 62 interrupt-parent = <&mpic>; 63 interrupts = <18 2>; 64 }; 65 66 L2: l2-cache-controller@20000 { 67 compatible = "fsl,8540-l2-cache-controller"; 68 reg = <0x20000 0x1000>; 69 cache-line-size = <32>; 70 cache-size = <0x40000>; // L2, 256K 71 interrupt-parent = <&mpic>; 72 interrupts = <16 2>; 73 }; 74 75 i2c@3000 { 76 #address-cells = <1>; 77 #size-cells = <0>; 78 cell-index = <0>; 79 compatible = "fsl-i2c"; 80 reg = <0x3000 0x100>; 81 interrupts = <43 2>; 82 interrupt-parent = <&mpic>; 83 dfsrr; 84 }; 85 86 dma@21300 { 87 #address-cells = <1>; 88 #size-cells = <1>; 89 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; 90 reg = <0x21300 0x4>; 91 ranges = <0x0 0x21100 0x200>; 92 cell-index = <0>; 93 dma-channel@0 { 94 compatible = "fsl,mpc8560-dma-channel", 95 "fsl,eloplus-dma-channel"; 96 reg = <0x0 0x80>; 97 cell-index = <0>; 98 interrupt-parent = <&mpic>; 99 interrupts = <20 2>; 100 }; 101 dma-channel@80 { 102 compatible = "fsl,mpc8560-dma-channel", 103 "fsl,eloplus-dma-channel"; 104 reg = <0x80 0x80>; 105 cell-index = <1>; 106 interrupt-parent = <&mpic>; 107 interrupts = <21 2>; 108 }; 109 dma-channel@100 { 110 compatible = "fsl,mpc8560-dma-channel", 111 "fsl,eloplus-dma-channel"; 112 reg = <0x100 0x80>; 113 cell-index = <2>; 114 interrupt-parent = <&mpic>; 115 interrupts = <22 2>; 116 }; 117 dma-channel@180 { 118 compatible = "fsl,mpc8560-dma-channel", 119 "fsl,eloplus-dma-channel"; 120 reg = <0x180 0x80>; 121 cell-index = <3>; 122 interrupt-parent = <&mpic>; 123 interrupts = <23 2>; 124 }; 125 }; 126 127 mdio@24520 { 128 #address-cells = <1>; 129 #size-cells = <0>; 130 compatible = "fsl,gianfar-mdio"; 131 reg = <0x24520 0x20>; 132 133 phy2: ethernet-phy@2 { 134 interrupt-parent = <&mpic>; 135 interrupts = <5 4>; 136 reg = <2>; 137 device_type = "ethernet-phy"; 138 }; 139 phy4: ethernet-phy@4 { 140 interrupt-parent = <&mpic>; 141 interrupts = <5 4>; 142 reg = <4>; 143 device_type = "ethernet-phy"; 144 }; 145 }; 146 147 enet0: ethernet@24000 { 148 cell-index = <0>; 149 device_type = "network"; 150 model = "TSEC"; 151 compatible = "gianfar"; 152 reg = <0x24000 0x1000>; 153 local-mac-address = [ 00 00 00 00 00 00 ]; 154 interrupts = <29 2 30 2 34 2>; 155 interrupt-parent = <&mpic>; 156 phy-handle = <&phy2>; 157 }; 158 159 enet1: ethernet@25000 { 160 cell-index = <1>; 161 device_type = "network"; 162 model = "TSEC"; 163 compatible = "gianfar"; 164 reg = <0x25000 0x1000>; 165 local-mac-address = [ 00 00 00 00 00 00 ]; 166 interrupts = <35 2 36 2 40 2>; 167 interrupt-parent = <&mpic>; 168 phy-handle = <&phy4>; 169 }; 170 171 mpic: pic@40000 { 172 interrupt-controller; 173 #address-cells = <0>; 174 #interrupt-cells = <2>; 175 reg = <0x40000 0x40000>; 176 compatible = "chrp,open-pic"; 177 device_type = "open-pic"; 178 }; 179 180 cpm@919c0 { 181 #address-cells = <1>; 182 #size-cells = <1>; 183 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus"; 184 reg = <0x919c0 0x30>; 185 ranges; 186 187 muram@80000 { 188 #address-cells = <1>; 189 #size-cells = <1>; 190 ranges = <0 0x80000 0x10000>; 191 192 data@0 { 193 compatible = "fsl,cpm-muram-data"; 194 reg = <0 0x4000 0x9000 0x2000>; 195 }; 196 }; 197 198 brg@919f0 { 199 compatible = "fsl,mpc8560-brg", 200 "fsl,cpm2-brg", 201 "fsl,cpm-brg"; 202 reg = <0x919f0 0x10 0x915f0 0x10>; 203 clock-frequency = <0>; 204 }; 205 206 cpmpic: pic@90c00 { 207 interrupt-controller; 208 #address-cells = <0>; 209 #interrupt-cells = <2>; 210 interrupts = <46 2>; 211 interrupt-parent = <&mpic>; 212 reg = <0x90c00 0x80>; 213 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; 214 }; 215 216 serial0: serial@91a20 { 217 device_type = "serial"; 218 compatible = "fsl,mpc8560-scc-uart", 219 "fsl,cpm2-scc-uart"; 220 reg = <0x91a20 0x20 0x88100 0x100>; 221 fsl,cpm-brg = <2>; 222 fsl,cpm-command = <0x4a00000>; 223 interrupts = <41 8>; 224 interrupt-parent = <&cpmpic>; 225 }; 226 }; 227 }; 228 229 pci0: pci@fdf08000 { 230 cell-index = <0>; 231 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 232 interrupt-map = < 233 234 /* IDSEL 0x0c */ 235 0x6000 0 0 1 &mpic 1 1 236 0x6000 0 0 2 &mpic 2 1 237 0x6000 0 0 3 &mpic 3 1 238 0x6000 0 0 4 &mpic 4 1 239 240 /* IDSEL 0x0d */ 241 0x6800 0 0 1 &mpic 4 1 242 0x6800 0 0 2 &mpic 1 1 243 0x6800 0 0 3 &mpic 2 1 244 0x6800 0 0 4 &mpic 3 1 245 246 /* IDSEL 0x0e */ 247 0x7000 0 0 1 &mpic 3 1 248 0x7000 0 0 2 &mpic 4 1 249 0x7000 0 0 3 &mpic 1 1 250 0x7000 0 0 4 &mpic 2 1 251 252 /* IDSEL 0x0f */ 253 0x7800 0 0 1 &mpic 2 1 254 0x7800 0 0 2 &mpic 3 1 255 0x7800 0 0 3 &mpic 4 1 256 0x7800 0 0 4 &mpic 1 1>; 257 258 interrupt-parent = <&mpic>; 259 interrupts = <24 2>; 260 bus-range = <0 0>; 261 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 262 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>; 263 clock-frequency = <66666666>; 264 #interrupt-cells = <1>; 265 #size-cells = <2>; 266 #address-cells = <3>; 267 reg = <0xfdf08000 0x1000>; 268 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; 269 device_type = "pci"; 270 }; 271}; 272