1/* 2 * Device Tree Source for PlatHome OpenBlockS 600 (405EX) 3 * 4 * Copyright 2011 Ben Herrenschmidt, IBM Corp. 5 * 6 * Based on Kilauea by: 7 * 8 * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> 9 * 10 * This file is licensed under the terms of the GNU General Public 11 * License version 2. This program is licensed "as is" without 12 * any warranty of any kind, whether express or implied. 13 */ 14 15/dts-v1/; 16 17/ { 18 #address-cells = <1>; 19 #size-cells = <1>; 20 model = "PlatHome,OpenBlockS 600"; 21 compatible = "plathome,obs600"; 22 dcr-parent = <&{/cpus/cpu@0}>; 23 24 aliases { 25 ethernet0 = &EMAC0; 26 ethernet1 = &EMAC1; 27 serial0 = &UART0; 28 serial1 = &UART1; 29 }; 30 31 cpus { 32 #address-cells = <1>; 33 #size-cells = <0>; 34 35 cpu@0 { 36 device_type = "cpu"; 37 model = "PowerPC,405EX"; 38 reg = <0x00000000>; 39 clock-frequency = <0>; /* Filled in by U-Boot */ 40 timebase-frequency = <0>; /* Filled in by U-Boot */ 41 i-cache-line-size = <32>; 42 d-cache-line-size = <32>; 43 i-cache-size = <16384>; /* 16 kB */ 44 d-cache-size = <16384>; /* 16 kB */ 45 dcr-controller; 46 dcr-access-method = "native"; 47 }; 48 }; 49 50 memory { 51 device_type = "memory"; 52 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ 53 }; 54 55 UIC0: interrupt-controller { 56 compatible = "ibm,uic-405ex", "ibm,uic"; 57 interrupt-controller; 58 cell-index = <0>; 59 dcr-reg = <0x0c0 0x009>; 60 #address-cells = <0>; 61 #size-cells = <0>; 62 #interrupt-cells = <2>; 63 }; 64 65 UIC1: interrupt-controller1 { 66 compatible = "ibm,uic-405ex","ibm,uic"; 67 interrupt-controller; 68 cell-index = <1>; 69 dcr-reg = <0x0d0 0x009>; 70 #address-cells = <0>; 71 #size-cells = <0>; 72 #interrupt-cells = <2>; 73 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 74 interrupt-parent = <&UIC0>; 75 }; 76 77 UIC2: interrupt-controller2 { 78 compatible = "ibm,uic-405ex","ibm,uic"; 79 interrupt-controller; 80 cell-index = <2>; 81 dcr-reg = <0x0e0 0x009>; 82 #address-cells = <0>; 83 #size-cells = <0>; 84 #interrupt-cells = <2>; 85 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ 86 interrupt-parent = <&UIC0>; 87 }; 88 89 CPM0: cpm { 90 compatible = "ibm,cpm"; 91 dcr-access-method = "native"; 92 dcr-reg = <0x0b0 0x003>; 93 unused-units = <0x00000000>; 94 idle-doze = <0x02000000>; 95 standby = <0xe3e74800>; 96 }; 97 98 plb { 99 compatible = "ibm,plb-405ex", "ibm,plb4"; 100 #address-cells = <1>; 101 #size-cells = <1>; 102 ranges; 103 clock-frequency = <0>; /* Filled in by U-Boot */ 104 105 SDRAM0: memory-controller { 106 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2"; 107 dcr-reg = <0x010 0x002>; 108 interrupt-parent = <&UIC2>; 109 interrupts = <0x5 0x4 /* ECC DED Error */ 110 0x6 0x4>; /* ECC SEC Error */ 111 }; 112 113 CRYPTO: crypto@ef700000 { 114 compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto"; 115 reg = <0xef700000 0x80400>; 116 interrupt-parent = <&UIC0>; 117 interrupts = <0x17 0x2>; 118 }; 119 120 MAL0: mcmal { 121 compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; 122 dcr-reg = <0x180 0x062>; 123 num-tx-chans = <2>; 124 num-rx-chans = <2>; 125 interrupt-parent = <&MAL0>; 126 interrupts = <0x0 0x1 0x2 0x3 0x4>; 127 #interrupt-cells = <1>; 128 #address-cells = <0>; 129 #size-cells = <0>; 130 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 131 /*RXEOB*/ 0x1 &UIC0 0xb 0x4 132 /*SERR*/ 0x2 &UIC1 0x0 0x4 133 /*TXDE*/ 0x3 &UIC1 0x1 0x4 134 /*RXDE*/ 0x4 &UIC1 0x2 0x4>; 135 interrupt-map-mask = <0xffffffff>; 136 }; 137 138 POB0: opb { 139 compatible = "ibm,opb-405ex", "ibm,opb"; 140 #address-cells = <1>; 141 #size-cells = <1>; 142 ranges = <0x80000000 0x80000000 0x10000000 143 0xef600000 0xef600000 0x00a00000 144 0xf0000000 0xf0000000 0x10000000>; 145 dcr-reg = <0x0a0 0x005>; 146 clock-frequency = <0>; /* Filled in by U-Boot */ 147 148 EBC0: ebc { 149 compatible = "ibm,ebc-405ex", "ibm,ebc"; 150 dcr-reg = <0x012 0x002>; 151 #address-cells = <2>; 152 #size-cells = <1>; 153 clock-frequency = <0>; /* Filled in by U-Boot */ 154 /* ranges property is supplied by U-Boot */ 155 interrupts = <0x5 0x1>; 156 interrupt-parent = <&UIC1>; 157 158 nor_flash@0,0 { 159 compatible = "amd,s29gl512n", "cfi-flash"; 160 bank-width = <2>; 161 reg = <0x00000000 0x00000000 0x08000000>; 162 #address-cells = <1>; 163 #size-cells = <1>; 164 partition@0 { 165 label = "kernel + initrd"; 166 reg = <0x00000000 0x03de0000>; 167 }; 168 partition@3de0000 { 169 label = "user config area"; 170 reg = <0x03de0000 0x00080000>; 171 }; 172 partition@3e60000 { 173 label = "user program area"; 174 reg = <0x03e60000 0x04000000>; 175 }; 176 partition@7e60000 { 177 label = "flat device tree"; 178 reg = <0x07e60000 0x00080000>; 179 }; 180 partition@7ee0000 { 181 label = "test program"; 182 reg = <0x07ee0000 0x00080000>; 183 }; 184 partition@7f60000 { 185 label = "u-boot env"; 186 reg = <0x07f60000 0x00040000>; 187 }; 188 partition@7fa0000 { 189 label = "u-boot"; 190 reg = <0x07fa0000 0x00060000>; 191 }; 192 }; 193 }; 194 195 UART0: serial@ef600200 { 196 device_type = "serial"; 197 compatible = "ns16550"; 198 reg = <0xef600200 0x00000008>; 199 virtual-reg = <0xef600200>; 200 clock-frequency = <0>; /* Filled in by U-Boot */ 201 current-speed = <0>; 202 interrupt-parent = <&UIC0>; 203 interrupts = <0x1a 0x4>; 204 }; 205 206 UART1: serial@ef600300 { 207 device_type = "serial"; 208 compatible = "ns16550"; 209 reg = <0xef600300 0x00000008>; 210 virtual-reg = <0xef600300>; 211 clock-frequency = <0>; /* Filled in by U-Boot */ 212 current-speed = <0>; 213 interrupt-parent = <&UIC0>; 214 interrupts = <0x1 0x4>; 215 }; 216 217 IIC0: i2c@ef600400 { 218 compatible = "ibm,iic-405ex", "ibm,iic"; 219 reg = <0xef600400 0x00000014>; 220 interrupt-parent = <&UIC0>; 221 interrupts = <0x2 0x4>; 222 #address-cells = <1>; 223 #size-cells = <0>; 224 225 rtc@68 { 226 compatible = "dallas,ds1340"; 227 reg = <0x68>; 228 }; 229 }; 230 231 IIC1: i2c@ef600500 { 232 compatible = "ibm,iic-405ex", "ibm,iic"; 233 reg = <0xef600500 0x00000014>; 234 interrupt-parent = <&UIC0>; 235 interrupts = <0x7 0x4>; 236 }; 237 238 RGMII0: emac-rgmii@ef600b00 { 239 compatible = "ibm,rgmii-405ex", "ibm,rgmii"; 240 reg = <0xef600b00 0x00000104>; 241 has-mdio; 242 }; 243 244 EMAC0: ethernet@ef600900 { 245 linux,network-index = <0x0>; 246 device_type = "network"; 247 compatible = "ibm,emac-405ex", "ibm,emac4sync"; 248 interrupt-parent = <&EMAC0>; 249 interrupts = <0x0 0x1>; 250 #interrupt-cells = <1>; 251 #address-cells = <0>; 252 #size-cells = <0>; 253 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 254 /*Wake*/ 0x1 &UIC1 0x1d 0x4>; 255 reg = <0xef600900 0x000000c4>; 256 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 257 mal-device = <&MAL0>; 258 mal-tx-channel = <0>; 259 mal-rx-channel = <0>; 260 cell-index = <0>; 261 max-frame-size = <9000>; 262 rx-fifo-size = <4096>; 263 tx-fifo-size = <2048>; 264 rx-fifo-size-gige = <16384>; 265 tx-fifo-size-gige = <16384>; 266 phy-mode = "rgmii"; 267 phy-map = <0x00000000>; 268 rgmii-device = <&RGMII0>; 269 rgmii-channel = <0>; 270 has-inverted-stacr-oc; 271 has-new-stacr-staopc; 272 }; 273 274 EMAC1: ethernet@ef600a00 { 275 linux,network-index = <0x1>; 276 device_type = "network"; 277 compatible = "ibm,emac-405ex", "ibm,emac4sync"; 278 interrupt-parent = <&EMAC1>; 279 interrupts = <0x0 0x1>; 280 #interrupt-cells = <1>; 281 #address-cells = <0>; 282 #size-cells = <0>; 283 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 284 /*Wake*/ 0x1 &UIC1 0x1f 0x4>; 285 reg = <0xef600a00 0x000000c4>; 286 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 287 mal-device = <&MAL0>; 288 mal-tx-channel = <1>; 289 mal-rx-channel = <1>; 290 cell-index = <1>; 291 max-frame-size = <9000>; 292 rx-fifo-size = <4096>; 293 tx-fifo-size = <2048>; 294 rx-fifo-size-gige = <16384>; 295 tx-fifo-size-gige = <16384>; 296 phy-mode = "rgmii"; 297 phy-map = <0x00000000>; 298 rgmii-device = <&RGMII0>; 299 rgmii-channel = <1>; 300 has-inverted-stacr-oc; 301 has-new-stacr-staopc; 302 }; 303 304 GPIO: gpio@ef600800 { 305 device_type = "gpio"; 306 compatible = "ibm,gpio-405ex", "ibm,ppc4xx-gpio"; 307 reg = <0xef600800 0x50>; 308 }; 309 }; 310 }; 311 chosen { 312 stdout-path = "/plb/opb/serial@ef600200"; 313 }; 314}; 315