xref: /openbmc/linux/arch/powerpc/boot/dts/mucmc52.dts (revision f35e839a)
1/*
2 * Manroland mucmc52 board Device Tree Source
3 *
4 * Copyright (C) 2009 DENX Software Engineering GmbH
5 * Heiko Schocher <hs@denx.de>
6 * Copyright 2006-2007 Secret Lab Technologies Ltd.
7 *
8 * This program is free software; you can redistribute  it and/or modify it
9 * under  the terms of  the GNU General  Public License as published by the
10 * Free Software Foundation;  either version 2 of the  License, or (at your
11 * option) any later version.
12 */
13
14/include/ "mpc5200b.dtsi"
15
16/* Timer pins that need to be in GPIO mode */
17&gpt0 { gpio-controller; };
18&gpt1 { gpio-controller; };
19&gpt2 { gpio-controller; };
20&gpt3 { gpio-controller; };
21
22/* Disabled timers */
23&gpt4 { status = "disabled"; };
24&gpt5 { status = "disabled"; };
25&gpt6 { status = "disabled"; };
26&gpt7 { status = "disabled"; };
27
28/ {
29	model = "manroland,mucmc52";
30	compatible = "manroland,mucmc52";
31
32	soc5200@f0000000 {
33		rtc@800 {
34			status = "disabled";
35		};
36
37		can@900 {
38			status = "disabled";
39		};
40
41		can@980 {
42			status = "disabled";
43		};
44
45		spi@f00 {
46			status = "disabled";
47		};
48
49		usb@1000 {
50			status = "disabled";
51		};
52
53		psc@2000 {		// PSC1
54			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
55		};
56
57		psc@2200 {		// PSC2
58			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
59		};
60
61		psc@2400 {		// PSC3
62			status = "disabled";
63		};
64
65		psc@2600 {		// PSC4
66			status = "disabled";
67		};
68
69		psc@2800 {		// PSC5
70			status = "disabled";
71		};
72
73		psc@2c00 {		// PSC6
74			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
75		};
76
77		ethernet@3000 {
78			phy-handle = <&phy0>;
79		};
80
81		mdio@3000 {
82			phy0: ethernet-phy@0 {
83				compatible = "intel,lxt971";
84				reg = <0>;
85			};
86		};
87
88		i2c@3d00 {
89			status = "disabled";
90		};
91
92		i2c@3d40 {
93			hwmon@2c {
94				compatible = "ad,adm9240";
95				reg = <0x2c>;
96			};
97			rtc@51 {
98				compatible = "nxp,pcf8563";
99				reg = <0x51>;
100			};
101		};
102	};
103
104	pci@f0000d00 {
105		interrupt-map-mask = <0xf800 0 0 7>;
106		interrupt-map = <
107				/* IDSEL 0x10 */
108				0x8000 0 0 1 &mpc5200_pic 0 3 3
109				0x8000 0 0 2 &mpc5200_pic 0 3 3
110				0x8000 0 0 3 &mpc5200_pic 0 2 3
111				0x8000 0 0 4 &mpc5200_pic 0 1 3
112				>;
113		ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000
114			  0x02000000 0 0x90000000 0x90000000 0 0x10000000
115			  0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
116	};
117
118	localbus {
119		ranges = <0 0 0xff800000 0x00800000
120			  1 0 0x80000000 0x00800000
121			  3 0 0x80000000 0x00800000>;
122
123		flash@0,0 {
124			compatible = "cfi-flash";
125			reg = <0 0 0x00800000>;
126			bank-width = <4>;
127			device-width = <2>;
128			#size-cells = <1>;
129			#address-cells = <1>;
130			partition@0 {
131				label = "DTS";
132				reg = <0x0 0x00100000>;
133			};
134			partition@100000 {
135				label = "Kernel";
136				reg = <0x100000 0x00200000>;
137			};
138			partition@300000 {
139				label = "RootFS";
140				reg = <0x00300000 0x00200000>;
141			};
142			partition@500000 {
143				label = "user";
144				reg = <0x00500000 0x00200000>;
145			};
146			partition@700000 {
147				label = "U-Boot";
148				reg = <0x00700000 0x00040000>;
149			};
150			partition@740000 {
151				label = "Env";
152				reg = <0x00740000 0x00020000>;
153			};
154			partition@760000 {
155				label = "red. Env";
156				reg = <0x00760000 0x00020000>;
157			};
158			partition@780000 {
159				label = "reserve";
160				reg = <0x00780000 0x00080000>;
161			};
162		};
163
164		simple100: gpio-controller-100@3,600100 {
165			compatible = "manroland,mucmc52-aux-gpio";
166			reg = <3 0x00600100 0x1>;
167			gpio-controller;
168			#gpio-cells = <2>;
169		};
170		simple104: gpio-controller-104@3,600104 {
171			compatible = "manroland,mucmc52-aux-gpio";
172			reg = <3 0x00600104 0x1>;
173			gpio-controller;
174			#gpio-cells = <2>;
175		};
176		simple200: gpio-controller-200@3,600200 {
177			compatible = "manroland,mucmc52-aux-gpio";
178			reg = <3 0x00600200 0x1>;
179			gpio-controller;
180			#gpio-cells = <2>;
181		};
182		simple201: gpio-controller-201@3,600201 {
183			compatible = "manroland,mucmc52-aux-gpio";
184			reg = <3 0x00600201 0x1>;
185			gpio-controller;
186			#gpio-cells = <2>;
187		};
188		simple202: gpio-controller-202@3,600202 {
189			compatible = "manroland,mucmc52-aux-gpio";
190			reg = <3 0x00600202 0x1>;
191			gpio-controller;
192			#gpio-cells = <2>;
193		};
194		simple203: gpio-controller-203@3,600203 {
195			compatible = "manroland,mucmc52-aux-gpio";
196			reg = <3 0x00600203 0x1>;
197			gpio-controller;
198			#gpio-cells = <2>;
199		};
200		simple204: gpio-controller-204@3,600204 {
201			compatible = "manroland,mucmc52-aux-gpio";
202			reg = <3 0x00600204 0x1>;
203			gpio-controller;
204			#gpio-cells = <2>;
205		};
206		simple206: gpio-controller-206@3,600206 {
207			compatible = "manroland,mucmc52-aux-gpio";
208			reg = <3 0x00600206 0x1>;
209			gpio-controller;
210			#gpio-cells = <2>;
211		};
212		simple207: gpio-controller-207@3,600207 {
213			compatible = "manroland,mucmc52-aux-gpio";
214			reg = <3 0x00600207 0x1>;
215			gpio-controller;
216			#gpio-cells = <2>;
217		};
218		simple20f: gpio-controller-20f@3,60020f {
219			compatible = "manroland,mucmc52-aux-gpio";
220			reg = <3 0x0060020f 0x1>;
221			gpio-controller;
222			#gpio-cells = <2>;
223		};
224
225	};
226};
227