1/*
2 * MPC8379E RDB Device Tree Source
3 *
4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute  it and/or modify it
7 * under  the terms of  the GNU General  Public License as published by the
8 * Free Software Foundation;  either version 2 of the  License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15	compatible = "fsl,mpc8379rdb";
16	#address-cells = <1>;
17	#size-cells = <1>;
18
19	aliases {
20		ethernet0 = &enet0;
21		ethernet1 = &enet1;
22		serial0 = &serial0;
23		serial1 = &serial1;
24		pci0 = &pci0;
25	};
26
27	cpus {
28		#address-cells = <1>;
29		#size-cells = <0>;
30
31		PowerPC,8379@0 {
32			device_type = "cpu";
33			reg = <0x0>;
34			d-cache-line-size = <32>;
35			i-cache-line-size = <32>;
36			d-cache-size = <32768>;
37			i-cache-size = <32768>;
38			timebase-frequency = <0>;
39			bus-frequency = <0>;
40			clock-frequency = <0>;
41		};
42	};
43
44	memory {
45		device_type = "memory";
46		reg = <0x00000000 0x10000000>;	// 256MB at 0
47	};
48
49	localbus@e0005000 {
50		#address-cells = <2>;
51		#size-cells = <1>;
52		compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
53		reg = <0xe0005000 0x1000>;
54		interrupts = <77 0x8>;
55		interrupt-parent = <&ipic>;
56
57		// CS0 and CS1 are swapped when
58		// booting from nand, but the
59		// addresses are the same.
60		ranges = <0x0 0x0 0xfe000000 0x00800000
61		          0x1 0x0 0xe0600000 0x00008000
62		          0x2 0x0 0xf0000000 0x00020000
63		          0x3 0x0 0xfa000000 0x00008000>;
64
65		flash@0,0 {
66			#address-cells = <1>;
67			#size-cells = <1>;
68			compatible = "cfi-flash";
69			reg = <0x0 0x0 0x800000>;
70			bank-width = <2>;
71			device-width = <1>;
72		};
73
74		nand@1,0 {
75			#address-cells = <1>;
76			#size-cells = <1>;
77			compatible = "fsl,mpc8379-fcm-nand",
78			             "fsl,elbc-fcm-nand";
79			reg = <0x1 0x0 0x8000>;
80
81			u-boot@0 {
82				reg = <0x0 0x100000>;
83				read-only;
84			};
85
86			kernel@100000 {
87				reg = <0x100000 0x300000>;
88			};
89			fs@400000 {
90				reg = <0x400000 0x1c00000>;
91			};
92		};
93	};
94
95	immr@e0000000 {
96		#address-cells = <1>;
97		#size-cells = <1>;
98		device_type = "soc";
99		compatible = "simple-bus";
100		ranges = <0x0 0xe0000000 0x00100000>;
101		reg = <0xe0000000 0x00000200>;
102		bus-frequency = <0>;
103
104		wdt@200 {
105			device_type = "watchdog";
106			compatible = "mpc83xx_wdt";
107			reg = <0x200 0x100>;
108		};
109
110		i2c@3000 {
111			#address-cells = <1>;
112			#size-cells = <0>;
113			cell-index = <0>;
114			compatible = "fsl-i2c";
115			reg = <0x3000 0x100>;
116			interrupts = <14 0x8>;
117			interrupt-parent = <&ipic>;
118			dfsrr;
119			rtc@68 {
120				device_type = "rtc";
121				compatible = "dallas,ds1339";
122				reg = <0x68>;
123			};
124		};
125
126		i2c@3100 {
127			#address-cells = <1>;
128			#size-cells = <0>;
129			cell-index = <1>;
130			compatible = "fsl-i2c";
131			reg = <0x3100 0x100>;
132			interrupts = <15 0x8>;
133			interrupt-parent = <&ipic>;
134			dfsrr;
135		};
136
137		spi@7000 {
138			cell-index = <0>;
139			compatible = "fsl,spi";
140			reg = <0x7000 0x1000>;
141			interrupts = <16 0x8>;
142			interrupt-parent = <&ipic>;
143			mode = "cpu";
144		};
145
146		usb@23000 {
147			compatible = "fsl-usb2-dr";
148			reg = <0x23000 0x1000>;
149			#address-cells = <1>;
150			#size-cells = <0>;
151			interrupt-parent = <&ipic>;
152			interrupts = <38 0x8>;
153			phy_type = "ulpi";
154		};
155
156		mdio@24520 {
157			#address-cells = <1>;
158			#size-cells = <0>;
159			compatible = "fsl,gianfar-mdio";
160			reg = <0x24520 0x20>;
161			phy2: ethernet-phy@2 {
162				interrupt-parent = <&ipic>;
163				interrupts = <17 0x8>;
164				reg = <0x2>;
165				device_type = "ethernet-phy";
166			};
167			phy3: ethernet-phy@3 {
168				interrupt-parent = <&ipic>;
169				interrupts = <18 0x8>;
170				reg = <0x3>;
171				device_type = "ethernet-phy";
172			};
173		};
174
175		enet0: ethernet@24000 {
176			cell-index = <0>;
177			device_type = "network";
178			model = "eTSEC";
179			compatible = "gianfar";
180			reg = <0x24000 0x1000>;
181			local-mac-address = [ 00 00 00 00 00 00 ];
182			interrupts = <32 0x8 33 0x8 34 0x8>;
183			phy-connection-type = "mii";
184			interrupt-parent = <&ipic>;
185			phy-handle = <&phy2>;
186		};
187
188		enet1: ethernet@25000 {
189			cell-index = <1>;
190			device_type = "network";
191			model = "eTSEC";
192			compatible = "gianfar";
193			reg = <0x25000 0x1000>;
194			local-mac-address = [ 00 00 00 00 00 00 ];
195			interrupts = <35 0x8 36 0x8 37 0x8>;
196			phy-connection-type = "mii";
197			interrupt-parent = <&ipic>;
198			phy-handle = <&phy3>;
199		};
200
201		serial0: serial@4500 {
202			cell-index = <0>;
203			device_type = "serial";
204			compatible = "ns16550";
205			reg = <0x4500 0x100>;
206			clock-frequency = <0>;
207			interrupts = <9 0x8>;
208			interrupt-parent = <&ipic>;
209		};
210
211		serial1: serial@4600 {
212			cell-index = <1>;
213			device_type = "serial";
214			compatible = "ns16550";
215			reg = <0x4600 0x100>;
216			clock-frequency = <0>;
217			interrupts = <10 0x8>;
218			interrupt-parent = <&ipic>;
219		};
220
221		crypto@30000 {
222			model = "SEC3";
223			device_type = "crypto";
224			compatible = "talitos";
225			reg = <0x30000 0x10000>;
226			interrupts = <11 0x8>;
227			interrupt-parent = <&ipic>;
228			/* Rev. 3.0 geometry */
229			num-channels = <4>;
230			channel-fifo-len = <24>;
231			exec-units-mask = <0x000001fe>;
232			descriptor-types-mask = <0x03ab0ebf>;
233		};
234
235		sata@18000 {
236			compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
237			reg = <0x18000 0x1000>;
238			interrupts = <44 0x8>;
239			interrupt-parent = <&ipic>;
240		};
241
242		sata@19000 {
243			compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
244			reg = <0x19000 0x1000>;
245			interrupts = <45 0x8>;
246			interrupt-parent = <&ipic>;
247		};
248
249		sata@1a000 {
250			compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
251			reg = <0x1a000 0x1000>;
252			interrupts = <46 0x8>;
253			interrupt-parent = <&ipic>;
254		};
255
256		sata@1b000 {
257			compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
258			reg = <0x1b000 0x1000>;
259			interrupts = <47 0x8>;
260			interrupt-parent = <&ipic>;
261		};
262
263		/* IPIC
264		 * interrupts cell = <intr #, sense>
265		 * sense values match linux IORESOURCE_IRQ_* defines:
266		 * sense == 8: Level, low assertion
267		 * sense == 2: Edge, high-to-low change
268		 */
269		ipic: interrupt-controller@700 {
270			compatible = "fsl,ipic";
271			interrupt-controller;
272			#address-cells = <0>;
273			#interrupt-cells = <2>;
274			reg = <0x700 0x100>;
275		};
276	};
277
278	pci0: pci@e0008500 {
279		interrupt-map-mask = <0xf800 0 0 7>;
280		interrupt-map = <
281				/* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
282
283				/* IDSEL AD14 IRQ6 inta */
284				 0x7000 0x0 0x0 0x1 &ipic 22 0x8
285
286				/* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
287				 0x7800 0x0 0x0 0x1 &ipic 21 0x8
288				 0x7800 0x0 0x0 0x2 &ipic 22 0x8
289				 0x7800 0x0 0x0 0x4 &ipic 23 0x8
290
291				/* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
292				 0xE000 0x0 0x0 0x1 &ipic 23 0x8
293				 0xE000 0x0 0x0 0x2 &ipic 21 0x8
294				 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
295		interrupt-parent = <&ipic>;
296		interrupts = <66 0x8>;
297		bus-range = <0x0 0x0>;
298		ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
299		          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
300		          0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
301		clock-frequency = <66666666>;
302		#interrupt-cells = <1>;
303		#size-cells = <2>;
304		#address-cells = <3>;
305		reg = <0xe0008500 0x100>;
306		compatible = "fsl,mpc8349-pci";
307		device_type = "pci";
308	};
309};
310