1/*
2 * MPC8349E-mITX-GP Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11/ {
12	model = "MPC8349EMITXGP";
13	compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
14	#address-cells = <1>;
15	#size-cells = <1>;
16
17	cpus {
18		#address-cells = <1>;
19		#size-cells = <0>;
20
21		PowerPC,8349@0 {
22			device_type = "cpu";
23			reg = <0>;
24			d-cache-line-size = <20>;
25			i-cache-line-size = <20>;
26			d-cache-size = <8000>;
27			i-cache-size = <8000>;
28			timebase-frequency = <0>;	// from bootloader
29			bus-frequency = <0>;		// from bootloader
30			clock-frequency = <0>;		// from bootloader
31		};
32	};
33
34	memory {
35		device_type = "memory";
36		reg = <00000000 10000000>;
37	};
38
39	soc8349@e0000000 {
40		#address-cells = <1>;
41		#size-cells = <1>;
42		device_type = "soc";
43		ranges = <0 e0000000 00100000>;
44		reg = <e0000000 00000200>;
45		bus-frequency = <0>;                    // from bootloader
46
47		wdt@200 {
48			device_type = "watchdog";
49			compatible = "mpc83xx_wdt";
50			reg = <200 100>;
51		};
52
53		i2c@3000 {
54			device_type = "i2c";
55			compatible = "fsl-i2c";
56			reg = <3000 100>;
57			interrupts = <e 8>;
58			interrupt-parent = < &ipic >;
59			dfsrr;
60		};
61
62		i2c@3100 {
63			device_type = "i2c";
64			compatible = "fsl-i2c";
65			reg = <3100 100>;
66			interrupts = <f 8>;
67			interrupt-parent = < &ipic >;
68			dfsrr;
69		};
70
71		spi@7000 {
72			device_type = "spi";
73			compatible = "mpc83xx_spi";
74			reg = <7000 1000>;
75			interrupts = <10 8>;
76			interrupt-parent = < &ipic >;
77			mode = <0>;
78		};
79
80		usb@23000 {
81			device_type = "usb";
82			compatible = "fsl-usb2-dr";
83			reg = <23000 1000>;
84			#address-cells = <1>;
85			#size-cells = <0>;
86			interrupt-parent = < &ipic >;
87			interrupts = <26 8>;
88			dr_mode = "otg";
89			phy_type = "ulpi";
90		};
91
92		mdio@24520 {
93			device_type = "mdio";
94			compatible = "gianfar";
95			reg = <24520 20>;
96			#address-cells = <1>;
97			#size-cells = <0>;
98
99			/* Vitesse 8201 */
100			phy1c: ethernet-phy@1c {
101				interrupt-parent = < &ipic >;
102				interrupts = <12 8>;
103				reg = <1c>;
104				device_type = "ethernet-phy";
105			};
106		};
107
108		ethernet@24000 {
109			device_type = "network";
110			model = "TSEC";
111			compatible = "gianfar";
112			reg = <24000 1000>;
113			local-mac-address = [ 00 00 00 00 00 00 ];
114			interrupts = <20 8 21 8 22 8>;
115			interrupt-parent = < &ipic >;
116			phy-handle = < &phy1c >;
117		};
118
119		serial@4500 {
120			device_type = "serial";
121			compatible = "ns16550";
122			reg = <4500 100>;
123			clock-frequency = <0>;		// from bootloader
124			interrupts = <9 8>;
125			interrupt-parent = < &ipic >;
126		};
127
128		serial@4600 {
129			device_type = "serial";
130			compatible = "ns16550";
131			reg = <4600 100>;
132			clock-frequency = <0>;		// from bootloader
133			interrupts = <a 8>;
134			interrupt-parent = < &ipic >;
135		};
136
137		pci@8600 {
138			interrupt-map-mask = <f800 0 0 7>;
139			interrupt-map = <
140					/* IDSEL 0x0F - PCI Slot */
141					7800 0 0 1 &ipic 14 8 /* PCI_INTA */
142					7800 0 0 2 &ipic 15 8 /* PCI_INTB */
143					 >;
144			interrupt-parent = < &ipic >;
145			interrupts = <43 8>;
146			bus-range = <1 1>;
147			ranges = <42000000 0 a0000000 a0000000 0 10000000
148				  02000000 0 b0000000 b0000000 0 10000000
149				  01000000 0 00000000 e3000000 0 01000000>;
150			clock-frequency = <3f940aa>;
151			#interrupt-cells = <1>;
152			#size-cells = <2>;
153			#address-cells = <3>;
154			reg = <8600 100>;
155			compatible = "fsl,mpc8349-pci";
156			device_type = "pci";
157		};
158
159		crypto@30000 {
160			device_type = "crypto";
161			model = "SEC2";
162			compatible = "talitos";
163			reg = <30000 10000>;
164			interrupts = <b 8>;
165			interrupt-parent = < &ipic >;
166			num-channels = <4>;
167			channel-fifo-len = <18>;
168			exec-units-mask = <0000007e>;
169			descriptor-types-mask = <01010ebf>;
170		};
171
172		ipic: pic@700 {
173			interrupt-controller;
174			#address-cells = <0>;
175			#interrupt-cells = <2>;
176			reg = <700 100>;
177			device_type = "ipic";
178		};
179	};
180};
181