1/* 2 * MPC8349E-mITX-GP Device Tree Source 3 * 4 * Copyright 2007 Freescale Semiconductor Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12/dts-v1/; 13 14/ { 15 model = "MPC8349EMITXGP"; 16 compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX"; 17 #address-cells = <1>; 18 #size-cells = <1>; 19 20 aliases { 21 ethernet0 = &enet0; 22 serial0 = &serial0; 23 serial1 = &serial1; 24 pci0 = &pci0; 25 }; 26 27 cpus { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 31 PowerPC,8349@0 { 32 device_type = "cpu"; 33 reg = <0x0>; 34 d-cache-line-size = <32>; 35 i-cache-line-size = <32>; 36 d-cache-size = <32768>; 37 i-cache-size = <32768>; 38 timebase-frequency = <0>; // from bootloader 39 bus-frequency = <0>; // from bootloader 40 clock-frequency = <0>; // from bootloader 41 }; 42 }; 43 44 memory { 45 device_type = "memory"; 46 reg = <0x00000000 0x10000000>; 47 }; 48 49 soc8349@e0000000 { 50 #address-cells = <1>; 51 #size-cells = <1>; 52 device_type = "soc"; 53 compatible = "simple-bus"; 54 ranges = <0x0 0xe0000000 0x00100000>; 55 reg = <0xe0000000 0x00000200>; 56 bus-frequency = <0>; // from bootloader 57 58 wdt@200 { 59 device_type = "watchdog"; 60 compatible = "mpc83xx_wdt"; 61 reg = <0x200 0x100>; 62 }; 63 64 i2c@3000 { 65 #address-cells = <1>; 66 #size-cells = <0>; 67 cell-index = <0>; 68 compatible = "fsl-i2c"; 69 reg = <0x3000 0x100>; 70 interrupts = <14 0x8>; 71 interrupt-parent = <&ipic>; 72 dfsrr; 73 }; 74 75 i2c@3100 { 76 #address-cells = <1>; 77 #size-cells = <0>; 78 cell-index = <1>; 79 compatible = "fsl-i2c"; 80 reg = <0x3100 0x100>; 81 interrupts = <15 0x8>; 82 interrupt-parent = <&ipic>; 83 dfsrr; 84 85 rtc@68 { 86 device_type = "rtc"; 87 compatible = "dallas,ds1339"; 88 reg = <0x68>; 89 interrupts = <18 0x8>; 90 interrupt-parent = <&ipic>; 91 }; 92 }; 93 94 spi@7000 { 95 cell-index = <0>; 96 compatible = "fsl,spi"; 97 reg = <0x7000 0x1000>; 98 interrupts = <16 0x8>; 99 interrupt-parent = <&ipic>; 100 mode = "cpu"; 101 }; 102 103 dma@82a8 { 104 #address-cells = <1>; 105 #size-cells = <1>; 106 compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; 107 reg = <0x82a8 4>; 108 ranges = <0 0x8100 0x1a8>; 109 interrupt-parent = <&ipic>; 110 interrupts = <71 8>; 111 cell-index = <0>; 112 dma-channel@0 { 113 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 114 reg = <0 0x80>; 115 cell-index = <0>; 116 interrupt-parent = <&ipic>; 117 interrupts = <71 8>; 118 }; 119 dma-channel@80 { 120 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 121 reg = <0x80 0x80>; 122 cell-index = <1>; 123 interrupt-parent = <&ipic>; 124 interrupts = <71 8>; 125 }; 126 dma-channel@100 { 127 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 128 reg = <0x100 0x80>; 129 cell-index = <2>; 130 interrupt-parent = <&ipic>; 131 interrupts = <71 8>; 132 }; 133 dma-channel@180 { 134 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 135 reg = <0x180 0x28>; 136 cell-index = <3>; 137 interrupt-parent = <&ipic>; 138 interrupts = <71 8>; 139 }; 140 }; 141 142 usb@23000 { 143 compatible = "fsl-usb2-dr"; 144 reg = <0x23000 0x1000>; 145 #address-cells = <1>; 146 #size-cells = <0>; 147 interrupt-parent = <&ipic>; 148 interrupts = <38 0x8>; 149 dr_mode = "otg"; 150 phy_type = "ulpi"; 151 }; 152 153 mdio@24520 { 154 #address-cells = <1>; 155 #size-cells = <0>; 156 compatible = "fsl,gianfar-mdio"; 157 reg = <0x24520 0x20>; 158 159 /* Vitesse 8201 */ 160 phy1c: ethernet-phy@1c { 161 interrupt-parent = <&ipic>; 162 interrupts = <18 0x8>; 163 reg = <0x1c>; 164 device_type = "ethernet-phy"; 165 }; 166 }; 167 168 enet0: ethernet@24000 { 169 cell-index = <0>; 170 device_type = "network"; 171 model = "TSEC"; 172 compatible = "gianfar"; 173 reg = <0x24000 0x1000>; 174 local-mac-address = [ 00 00 00 00 00 00 ]; 175 interrupts = <32 0x8 33 0x8 34 0x8>; 176 interrupt-parent = <&ipic>; 177 phy-handle = <&phy1c>; 178 linux,network-index = <0>; 179 }; 180 181 serial0: serial@4500 { 182 cell-index = <0>; 183 device_type = "serial"; 184 compatible = "ns16550"; 185 reg = <0x4500 0x100>; 186 clock-frequency = <0>; // from bootloader 187 interrupts = <9 0x8>; 188 interrupt-parent = <&ipic>; 189 }; 190 191 serial1: serial@4600 { 192 cell-index = <1>; 193 device_type = "serial"; 194 compatible = "ns16550"; 195 reg = <0x4600 0x100>; 196 clock-frequency = <0>; // from bootloader 197 interrupts = <10 0x8>; 198 interrupt-parent = <&ipic>; 199 }; 200 201 crypto@30000 { 202 compatible = "fsl,sec2.0"; 203 reg = <0x30000 0x10000>; 204 interrupts = <11 0x8>; 205 interrupt-parent = <&ipic>; 206 fsl,num-channels = <4>; 207 fsl,channel-fifo-len = <24>; 208 fsl,exec-units-mask = <0x7e>; 209 fsl,descriptor-types-mask = <0x01010ebf>; 210 }; 211 212 ipic: pic@700 { 213 interrupt-controller; 214 #address-cells = <0>; 215 #interrupt-cells = <2>; 216 reg = <0x700 0x100>; 217 device_type = "ipic"; 218 }; 219 }; 220 221 pci0: pci@e0008600 { 222 cell-index = <2>; 223 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 224 interrupt-map = < 225 /* IDSEL 0x0F - PCI Slot */ 226 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */ 227 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */ 228 >; 229 interrupt-parent = <&ipic>; 230 interrupts = <67 0x8>; 231 bus-range = <0x1 0x1>; 232 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 233 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 234 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>; 235 clock-frequency = <66666666>; 236 #interrupt-cells = <1>; 237 #size-cells = <2>; 238 #address-cells = <3>; 239 reg = <0xe0008600 0x100 /* internal registers */ 240 0xe0008380 0x8>; /* config space access registers */ 241 compatible = "fsl,mpc8349-pci"; 242 device_type = "pci"; 243 }; 244}; 245