1/*
2 * MPC8349E-mITX-GP Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11/ {
12	model = "MPC8349EMITXGP";
13	compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
14	#address-cells = <1>;
15	#size-cells = <1>;
16
17	cpus {
18		#address-cells = <1>;
19		#size-cells = <0>;
20
21		PowerPC,8349@0 {
22			device_type = "cpu";
23			reg = <0>;
24			d-cache-line-size = <20>;
25			i-cache-line-size = <20>;
26			d-cache-size = <8000>;
27			i-cache-size = <8000>;
28			timebase-frequency = <0>;	// from bootloader
29			bus-frequency = <0>;		// from bootloader
30			clock-frequency = <0>;		// from bootloader
31			32-bit;
32		};
33	};
34
35	memory {
36		device_type = "memory";
37		reg = <00000000 10000000>;
38	};
39
40	soc8349@e0000000 {
41		#address-cells = <1>;
42		#size-cells = <1>;
43		#interrupt-cells = <2>;
44		device_type = "soc";
45		ranges = <0 e0000000 00100000>;
46		reg = <e0000000 00000200>;
47		bus-frequency = <0>;                    // from bootloader
48
49		wdt@200 {
50			device_type = "watchdog";
51			compatible = "mpc83xx_wdt";
52			reg = <200 100>;
53		};
54
55		i2c@3000 {
56			device_type = "i2c";
57			compatible = "fsl-i2c";
58			reg = <3000 100>;
59			interrupts = <e 8>;
60			interrupt-parent = < &ipic >;
61			dfsrr;
62		};
63
64		i2c@3100 {
65			device_type = "i2c";
66			compatible = "fsl-i2c";
67			reg = <3100 100>;
68			interrupts = <f 8>;
69			interrupt-parent = < &ipic >;
70			dfsrr;
71		};
72
73		spi@7000 {
74			device_type = "spi";
75			compatible = "mpc83xx_spi";
76			reg = <7000 1000>;
77			interrupts = <10 8>;
78			interrupt-parent = < &ipic >;
79			mode = <0>;
80		};
81
82		usb@23000 {
83			device_type = "usb";
84			compatible = "fsl-usb2-dr";
85			reg = <23000 1000>;
86			#address-cells = <1>;
87			#size-cells = <0>;
88			interrupt-parent = < &ipic >;
89			interrupts = <26 8>;
90			dr_mode = "otg";
91			phy_type = "ulpi";
92		};
93
94		mdio@24520 {
95			device_type = "mdio";
96			compatible = "gianfar";
97			reg = <24520 20>;
98			#address-cells = <1>;
99			#size-cells = <0>;
100
101			/* Vitesse 8201 */
102			phy1c: ethernet-phy@1c {
103				interrupt-parent = < &ipic >;
104				interrupts = <12 8>;
105				reg = <1c>;
106				device_type = "ethernet-phy";
107			};
108		};
109
110		ethernet@24000 {
111			device_type = "network";
112			model = "TSEC";
113			compatible = "gianfar";
114			reg = <24000 1000>;
115			local-mac-address = [ 00 00 00 00 00 00 ];
116			interrupts = <20 8 21 8 22 8>;
117			interrupt-parent = < &ipic >;
118			phy-handle = < &phy1c >;
119		};
120
121		serial@4500 {
122			device_type = "serial";
123			compatible = "ns16550";
124			reg = <4500 100>;
125			clock-frequency = <0>;		// from bootloader
126			interrupts = <9 8>;
127			interrupt-parent = < &ipic >;
128		};
129
130		serial@4600 {
131			device_type = "serial";
132			compatible = "ns16550";
133			reg = <4600 100>;
134			clock-frequency = <0>;		// from bootloader
135			interrupts = <a 8>;
136			interrupt-parent = < &ipic >;
137		};
138
139		pci@8600 {
140			interrupt-map-mask = <f800 0 0 7>;
141			interrupt-map = <
142					/* IDSEL 0x0F - PCI Slot */
143					7800 0 0 1 &ipic 14 8 /* PCI_INTA */
144					7800 0 0 2 &ipic 15 8 /* PCI_INTB */
145					 >;
146			interrupt-parent = < &ipic >;
147			interrupts = <43 8>;
148			bus-range = <1 1>;
149			ranges = <42000000 0 a0000000 a0000000 0 10000000
150				  02000000 0 b0000000 b0000000 0 10000000
151				  01000000 0 00000000 e3000000 0 01000000>;
152			clock-frequency = <3f940aa>;
153			#interrupt-cells = <1>;
154			#size-cells = <2>;
155			#address-cells = <3>;
156			reg = <8600 100>;
157			compatible = "83xx";
158			device_type = "pci";
159		};
160
161		crypto@30000 {
162			device_type = "crypto";
163			model = "SEC2";
164			compatible = "talitos";
165			reg = <30000 10000>;
166			interrupts = <b 8>;
167			interrupt-parent = < &ipic >;
168			num-channels = <4>;
169			channel-fifo-len = <18>;
170			exec-units-mask = <0000007e>;
171			descriptor-types-mask = <01010ebf>;
172		};
173
174		ipic: pic@700 {
175			interrupt-controller;
176			#address-cells = <0>;
177			#interrupt-cells = <2>;
178			reg = <700 100>;
179			built-in;
180			device_type = "ipic";
181		};
182	};
183};
184