1/* 2 * MPC8313E RDB Device Tree Source 3 * 4 * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12/dts-v1/; 13 14/ { 15 model = "MPC8313ERDB"; 16 compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB"; 17 #address-cells = <1>; 18 #size-cells = <1>; 19 20 aliases { 21 ethernet0 = &enet0; 22 ethernet1 = &enet1; 23 serial0 = &serial0; 24 serial1 = &serial1; 25 pci0 = &pci0; 26 }; 27 28 cpus { 29 #address-cells = <1>; 30 #size-cells = <0>; 31 32 PowerPC,8313@0 { 33 device_type = "cpu"; 34 reg = <0x0>; 35 d-cache-line-size = <32>; 36 i-cache-line-size = <32>; 37 d-cache-size = <16384>; 38 i-cache-size = <16384>; 39 timebase-frequency = <0>; // from bootloader 40 bus-frequency = <0>; // from bootloader 41 clock-frequency = <0>; // from bootloader 42 }; 43 }; 44 45 memory { 46 device_type = "memory"; 47 reg = <0x00000000 0x08000000>; // 128MB at 0 48 }; 49 50 localbus@e0005000 { 51 #address-cells = <2>; 52 #size-cells = <1>; 53 compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus"; 54 reg = <0xe0005000 0x1000>; 55 interrupts = <77 0x8>; 56 interrupt-parent = <&ipic>; 57 58 // CS0 and CS1 are swapped when 59 // booting from nand, but the 60 // addresses are the same. 61 ranges = <0x0 0x0 0xfe000000 0x00800000 62 0x1 0x0 0xe2800000 0x00008000 63 0x2 0x0 0xf0000000 0x00020000 64 0x3 0x0 0xfa000000 0x00008000>; 65 66 flash@0,0 { 67 #address-cells = <1>; 68 #size-cells = <1>; 69 compatible = "cfi-flash"; 70 reg = <0x0 0x0 0x800000>; 71 bank-width = <2>; 72 device-width = <1>; 73 }; 74 75 nand@1,0 { 76 #address-cells = <1>; 77 #size-cells = <1>; 78 compatible = "fsl,mpc8313-fcm-nand", 79 "fsl,elbc-fcm-nand"; 80 reg = <0x1 0x0 0x2000>; 81 82 u-boot@0 { 83 reg = <0x0 0x100000>; 84 read-only; 85 }; 86 87 kernel@100000 { 88 reg = <0x100000 0x300000>; 89 }; 90 91 fs@400000 { 92 reg = <0x400000 0x1c00000>; 93 }; 94 }; 95 }; 96 97 soc8313@e0000000 { 98 #address-cells = <1>; 99 #size-cells = <1>; 100 device_type = "soc"; 101 compatible = "simple-bus"; 102 ranges = <0x0 0xe0000000 0x00100000>; 103 reg = <0xe0000000 0x00000200>; 104 bus-frequency = <0>; 105 106 wdt@200 { 107 device_type = "watchdog"; 108 compatible = "mpc83xx_wdt"; 109 reg = <0x200 0x100>; 110 }; 111 112 i2c@3000 { 113 #address-cells = <1>; 114 #size-cells = <0>; 115 cell-index = <0>; 116 compatible = "fsl-i2c"; 117 reg = <0x3000 0x100>; 118 interrupts = <14 0x8>; 119 interrupt-parent = <&ipic>; 120 dfsrr; 121 rtc@68 { 122 compatible = "dallas,ds1339"; 123 reg = <0x68>; 124 }; 125 }; 126 127 i2c@3100 { 128 #address-cells = <1>; 129 #size-cells = <0>; 130 cell-index = <1>; 131 compatible = "fsl-i2c"; 132 reg = <0x3100 0x100>; 133 interrupts = <15 0x8>; 134 interrupt-parent = <&ipic>; 135 dfsrr; 136 }; 137 138 spi@7000 { 139 cell-index = <0>; 140 compatible = "fsl,spi"; 141 reg = <0x7000 0x1000>; 142 interrupts = <16 0x8>; 143 interrupt-parent = <&ipic>; 144 mode = "cpu"; 145 }; 146 147 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ 148 usb@23000 { 149 compatible = "fsl-usb2-dr"; 150 reg = <0x23000 0x1000>; 151 #address-cells = <1>; 152 #size-cells = <0>; 153 interrupt-parent = <&ipic>; 154 interrupts = <38 0x8>; 155 phy_type = "utmi_wide"; 156 }; 157 158 mdio@24520 { 159 #address-cells = <1>; 160 #size-cells = <0>; 161 compatible = "fsl,gianfar-mdio"; 162 reg = <0x24520 0x20>; 163 phy1: ethernet-phy@1 { 164 interrupt-parent = <&ipic>; 165 interrupts = <19 0x8>; 166 reg = <0x1>; 167 device_type = "ethernet-phy"; 168 }; 169 phy4: ethernet-phy@4 { 170 interrupt-parent = <&ipic>; 171 interrupts = <20 0x8>; 172 reg = <0x4>; 173 device_type = "ethernet-phy"; 174 }; 175 }; 176 177 enet0: ethernet@24000 { 178 cell-index = <0>; 179 device_type = "network"; 180 model = "eTSEC"; 181 compatible = "gianfar"; 182 reg = <0x24000 0x1000>; 183 local-mac-address = [ 00 00 00 00 00 00 ]; 184 interrupts = <37 0x8 36 0x8 35 0x8>; 185 interrupt-parent = <&ipic>; 186 phy-handle = < &phy1 >; 187 }; 188 189 enet1: ethernet@25000 { 190 cell-index = <1>; 191 device_type = "network"; 192 model = "eTSEC"; 193 compatible = "gianfar"; 194 reg = <0x25000 0x1000>; 195 local-mac-address = [ 00 00 00 00 00 00 ]; 196 interrupts = <34 0x8 33 0x8 32 0x8>; 197 interrupt-parent = <&ipic>; 198 phy-handle = < &phy4 >; 199 }; 200 201 serial0: serial@4500 { 202 cell-index = <0>; 203 device_type = "serial"; 204 compatible = "ns16550"; 205 reg = <0x4500 0x100>; 206 clock-frequency = <0>; 207 interrupts = <9 0x8>; 208 interrupt-parent = <&ipic>; 209 }; 210 211 serial1: serial@4600 { 212 cell-index = <1>; 213 device_type = "serial"; 214 compatible = "ns16550"; 215 reg = <0x4600 0x100>; 216 clock-frequency = <0>; 217 interrupts = <10 0x8>; 218 interrupt-parent = <&ipic>; 219 }; 220 221 crypto@30000 { 222 device_type = "crypto"; 223 model = "SEC2"; 224 compatible = "talitos"; 225 reg = <0x30000 0x7000>; 226 interrupts = <11 0x8>; 227 interrupt-parent = <&ipic>; 228 /* Rev. 2.2 */ 229 num-channels = <1>; 230 channel-fifo-len = <24>; 231 exec-units-mask = <0x0000004c>; 232 descriptor-types-mask = <0x0122003f>; 233 }; 234 235 /* IPIC 236 * interrupts cell = <intr #, sense> 237 * sense values match linux IORESOURCE_IRQ_* defines: 238 * sense == 8: Level, low assertion 239 * sense == 2: Edge, high-to-low change 240 */ 241 ipic: pic@700 { 242 interrupt-controller; 243 #address-cells = <0>; 244 #interrupt-cells = <2>; 245 reg = <0x700 0x100>; 246 device_type = "ipic"; 247 }; 248 }; 249 250 pci0: pci@e0008500 { 251 cell-index = <1>; 252 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 253 interrupt-map = < 254 255 /* IDSEL 0x0E -mini PCI */ 256 0x7000 0x0 0x0 0x1 &ipic 18 0x8 257 0x7000 0x0 0x0 0x2 &ipic 18 0x8 258 0x7000 0x0 0x0 0x3 &ipic 18 0x8 259 0x7000 0x0 0x0 0x4 &ipic 18 0x8 260 261 /* IDSEL 0x0F - PCI slot */ 262 0x7800 0x0 0x0 0x1 &ipic 17 0x8 263 0x7800 0x0 0x0 0x2 &ipic 18 0x8 264 0x7800 0x0 0x0 0x3 &ipic 17 0x8 265 0x7800 0x0 0x0 0x4 &ipic 18 0x8>; 266 interrupt-parent = <&ipic>; 267 interrupts = <66 0x8>; 268 bus-range = <0x0 0x0>; 269 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 270 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 271 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 272 clock-frequency = <66666666>; 273 #interrupt-cells = <1>; 274 #size-cells = <2>; 275 #address-cells = <3>; 276 reg = <0xe0008500 0x100>; 277 compatible = "fsl,mpc8349-pci"; 278 device_type = "pci"; 279 }; 280}; 281