1/*
2 * Device Tree Souce for Buffalo KuroboxHG
3 *
4 * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use
5 * the default configuration linkstation_defconfig.
6 *
7 * Based on sandpoint.dts
8 *
9 * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
10 *
11 * This file is licensed under
12 * the terms of the GNU General Public License version 2.  This program
13 * is licensed "as is" without any warranty of any kind, whether express
14 * or implied.
15
16XXXX add flash parts, rtc, ??
17
18 */
19
20/ {
21	model = "KuroboxHG";
22	compatible = "linkstation";
23	#address-cells = <1>;
24	#size-cells = <1>;
25
26	aliases {
27		serial0 = &serial0;
28		serial1 = &serial1;
29		pci0 = &pci0;
30	};
31
32	cpus {
33		#address-cells = <1>;
34		#size-cells = <0>;
35
36		PowerPC,603e { /* Really 8241 */
37			device_type = "cpu";
38			reg = <0>;
39			clock-frequency = <fdad680>;	/* Fixed by bootloader */
40			timebase-frequency = <1F04000>; /* Fixed by bootloader */
41			bus-frequency = <0>;		/* Fixed by bootloader */
42			/* Following required by dtc but not used */
43			i-cache-size = <4000>;
44			d-cache-size = <4000>;
45		};
46	};
47
48	memory {
49		device_type = "memory";
50		reg = <00000000 08000000>;
51	};
52
53	soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
54		#address-cells = <1>;
55		#size-cells = <1>;
56		device_type = "soc";
57		compatible = "mpc10x";
58		store-gathering = <0>; /* 0 == off, !0 == on */
59		reg = <80000000 00100000>;
60		ranges = <80000000 80000000 70000000	/* pci mem space */
61			  fc000000 fc000000 00100000	/* EUMB */
62			  fe000000 fe000000 00c00000	/* pci i/o space */
63			  fec00000 fec00000 00300000	/* pci cfg regs */
64			  fef00000 fef00000 00100000>;	/* pci iack */
65
66		i2c@80003000 {
67			#address-cells = <1>;
68			#size-cells = <0>;
69			cell-index = <0>;
70			compatible = "fsl-i2c";
71			reg = <80003000 1000>;
72			interrupts = <5 2>;
73			interrupt-parent = <&mpic>;
74
75			rtc@32 {
76				device_type = "rtc";
77				compatible = "ricoh,rs5c372a";
78				reg = <32>;
79			};
80		};
81
82		serial0: serial@80004500 {
83			cell-index = <0>;
84			device_type = "serial";
85			compatible = "ns16550";
86			reg = <80004500 8>;
87			clock-frequency = <7c044a8>;
88			current-speed = <2580>;
89			interrupts = <9 0>;
90			interrupt-parent = <&mpic>;
91		};
92
93		serial1: serial@80004600 {
94			cell-index = <1>;
95			device_type = "serial";
96			compatible = "ns16550";
97			reg = <80004600 8>;
98			clock-frequency = <7c044a8>;
99			current-speed = <e100>;
100			interrupts = <a 0>;
101			interrupt-parent = <&mpic>;
102		};
103
104		mpic: interrupt-controller@80040000 {
105			#interrupt-cells = <2>;
106			#address-cells = <0>;
107			device_type = "open-pic";
108			compatible = "chrp,open-pic";
109			interrupt-controller;
110			reg = <80040000 40000>;
111		};
112
113		pci0: pci@fec00000 {
114			#address-cells = <3>;
115			#size-cells = <2>;
116			#interrupt-cells = <1>;
117			device_type = "pci";
118			compatible = "mpc10x-pci";
119			reg = <fec00000 400000>;
120			ranges = <01000000 0        0 fe000000 0 00c00000
121				  02000000 0 80000000 80000000 0 70000000>;
122			bus-range = <0 ff>;
123			clock-frequency = <7f28155>;
124			interrupt-parent = <&mpic>;
125			interrupt-map-mask = <f800 0 0 7>;
126			interrupt-map = <
127				/* IDSEL 11 - IRQ0 ETH */
128				5800 0 0 1 &mpic 0 1
129				5800 0 0 2 &mpic 1 1
130				5800 0 0 3 &mpic 2 1
131				5800 0 0 4 &mpic 3 1
132				/* IDSEL 12 - IRQ1 IDE0 */
133				6000 0 0 1 &mpic 1 1
134				6000 0 0 2 &mpic 2 1
135				6000 0 0 3 &mpic 3 1
136				6000 0 0 4 &mpic 0 1
137				/* IDSEL 14 - IRQ3 USB2.0 */
138				7000 0 0 1 &mpic 3 1
139				7000 0 0 2 &mpic 3 1
140				7000 0 0 3 &mpic 3 1
141				7000 0 0 4 &mpic 3 1
142			>;
143		};
144	};
145};
146