1/* 2 * Device Tree Source for ESTeem 195E Hotfoot 3 * 4 * Copyright 2009 AbsoluteValue Systems <solomon@linux-wlan.com> 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without 8 * any warranty of any kind, whether express or implied. 9 */ 10 11/dts-v1/; 12 13/ { 14 #address-cells = <1>; 15 #size-cells = <1>; 16 model = "est,hotfoot"; 17 compatible = "est,hotfoot"; 18 dcr-parent = <&{/cpus/cpu@0}>; 19 20 aliases { 21 ethernet0 = &EMAC0; 22 ethernet1 = &EMAC1; 23 serial0 = &UART0; 24 serial1 = &UART1; 25 }; 26 27 cpus { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 31 cpu@0 { 32 device_type = "cpu"; 33 model = "PowerPC,405EP"; 34 reg = <0x00000000>; 35 clock-frequency = <0>; /* Filled in by zImage */ 36 timebase-frequency = <0>; /* Filled in by zImage */ 37 i-cache-line-size = <0x20>; 38 d-cache-line-size = <0x20>; 39 i-cache-size = <0x4000>; 40 d-cache-size = <0x4000>; 41 dcr-controller; 42 dcr-access-method = "native"; 43 }; 44 }; 45 46 memory { 47 device_type = "memory"; 48 reg = <0x00000000 0x00000000>; /* Filled in by zImage */ 49 }; 50 51 UIC0: interrupt-controller { 52 compatible = "ibm,uic"; 53 interrupt-controller; 54 cell-index = <0>; 55 dcr-reg = <0x0c0 0x009>; 56 #address-cells = <0>; 57 #size-cells = <0>; 58 #interrupt-cells = <2>; 59 }; 60 61 plb { 62 compatible = "ibm,plb3"; 63 #address-cells = <1>; 64 #size-cells = <1>; 65 ranges; 66 clock-frequency = <0>; /* Filled in by zImage */ 67 68 SDRAM0: memory-controller { 69 compatible = "ibm,sdram-405ep"; 70 dcr-reg = <0x010 0x002>; 71 }; 72 73 MAL: mcmal { 74 compatible = "ibm,mcmal-405ep", "ibm,mcmal"; 75 dcr-reg = <0x180 0x062>; 76 num-tx-chans = <4>; 77 num-rx-chans = <2>; 78 interrupt-parent = <&UIC0>; 79 interrupts = < 80 0xb 0x4 /* TXEOB */ 81 0xc 0x4 /* RXEOB */ 82 0xa 0x4 /* SERR */ 83 0xd 0x4 /* TXDE */ 84 0xe 0x4 /* RXDE */>; 85 }; 86 87 POB0: opb { 88 compatible = "ibm,opb-405ep", "ibm,opb"; 89 #address-cells = <1>; 90 #size-cells = <1>; 91 ranges = <0xef600000 0xef600000 0x00a00000>; 92 dcr-reg = <0x0a0 0x005>; 93 clock-frequency = <0>; /* Filled in by zImage */ 94 95 /* Hotfoot has UART0/UART1 swapped */ 96 97 UART0: serial@ef600400 { 98 device_type = "serial"; 99 compatible = "ns16550"; 100 reg = <0xef600400 0x00000008>; 101 virtual-reg = <0xef600400>; 102 clock-frequency = <0>; /* Filled in by zImage */ 103 current-speed = <0x9600>; 104 interrupt-parent = <&UIC0>; 105 interrupts = <0x1 0x4>; 106 }; 107 108 UART1: serial@ef600300 { 109 device_type = "serial"; 110 compatible = "ns16550"; 111 reg = <0xef600300 0x00000008>; 112 virtual-reg = <0xef600300>; 113 clock-frequency = <0>; /* Filled in by zImage */ 114 current-speed = <0x9600>; 115 interrupt-parent = <&UIC0>; 116 interrupts = <0x0 0x4>; 117 }; 118 119 IIC: i2c@ef600500 { 120 compatible = "ibm,iic-405ep", "ibm,iic"; 121 reg = <0xef600500 0x00000011>; 122 interrupt-parent = <&UIC0>; 123 interrupts = <0x2 0x4>; 124 125 rtc@68 { 126 /* Actually a DS1339 */ 127 compatible = "dallas,ds1307"; 128 reg = <0x68>; 129 }; 130 131 temp@4a { 132 /* Not present on all boards */ 133 compatible = "national,lm75"; 134 reg = <0x4a>; 135 }; 136 }; 137 138 GPIO: gpio@ef600700 { 139 #gpio-cells = <2>; 140 compatible = "ibm,ppc4xx-gpio"; 141 reg = <0xef600700 0x00000020>; 142 gpio-controller; 143 }; 144 145 gpio-leds { 146 compatible = "gpio-leds"; 147 status { 148 label = "Status"; 149 gpios = <&GPIO 1 0>; 150 }; 151 radiorx { 152 label = "Rx"; 153 gpios = <&GPIO 0xe 0>; 154 }; 155 }; 156 157 EMAC0: ethernet@ef600800 { 158 linux,network-index = <0x0>; 159 device_type = "network"; 160 compatible = "ibm,emac-405ep", "ibm,emac"; 161 interrupt-parent = <&UIC0>; 162 interrupts = < 163 0xf 0x4 /* Ethernet */ 164 0x9 0x4 /* Ethernet Wake Up */>; 165 local-mac-address = [000000000000]; /* Filled in by zImage */ 166 reg = <0xef600800 0x00000070>; 167 mal-device = <&MAL>; 168 mal-tx-channel = <0>; 169 mal-rx-channel = <0>; 170 cell-index = <0>; 171 max-frame-size = <0x5dc>; 172 rx-fifo-size = <0x1000>; 173 tx-fifo-size = <0x800>; 174 phy-mode = "mii"; 175 phy-map = <0x00000000>; 176 }; 177 178 EMAC1: ethernet@ef600900 { 179 linux,network-index = <0x1>; 180 device_type = "network"; 181 compatible = "ibm,emac-405ep", "ibm,emac"; 182 interrupt-parent = <&UIC0>; 183 interrupts = < 184 0x11 0x4 /* Ethernet */ 185 0x9 0x4 /* Ethernet Wake Up */>; 186 local-mac-address = [000000000000]; /* Filled in by zImage */ 187 reg = <0xef600900 0x00000070>; 188 mal-device = <&MAL>; 189 mal-tx-channel = <2>; 190 mal-rx-channel = <1>; 191 cell-index = <1>; 192 max-frame-size = <0x5dc>; 193 rx-fifo-size = <0x1000>; 194 tx-fifo-size = <0x800>; 195 mdio-device = <&EMAC0>; 196 phy-mode = "mii"; 197 phy-map = <0x0000001>; 198 }; 199 }; 200 201 EBC0: ebc { 202 compatible = "ibm,ebc-405ep", "ibm,ebc"; 203 dcr-reg = <0x012 0x002>; 204 #address-cells = <2>; 205 #size-cells = <1>; 206 207 /* The ranges property is supplied by the bootwrapper 208 * and is based on the firmware's configuration of the 209 * EBC bridge 210 */ 211 clock-frequency = <0>; /* Filled in by zImage */ 212 213 nor_flash@0 { 214 compatible = "cfi-flash"; 215 bank-width = <2>; 216 reg = <0x0 0xff800000 0x00800000>; 217 #address-cells = <1>; 218 #size-cells = <1>; 219 220 /* This mapping is for the 8M flash 221 4M flash has all ofssets -= 4M, 222 and FeatFS partition is not present */ 223 partition@0 { 224 label = "Bootloader"; 225 reg = <0x7c0000 0x40000>; 226 /* read-only; */ 227 }; 228 partition@1 { 229 label = "Env_and_Config_Primary"; 230 reg = <0x400000 0x10000>; 231 }; 232 partition@2 { 233 label = "Kernel"; 234 reg = <0x420000 0x100000>; 235 }; 236 partition@3 { 237 label = "Filesystem"; 238 reg = <0x520000 0x2a0000>; 239 }; 240 partition@4 { 241 label = "Env_and_Config_Secondary"; 242 reg = <0x410000 0x10000>; 243 }; 244 partition@5 { 245 label = "FeatFS"; 246 reg = <0x000000 0x400000>; 247 }; 248 partition@6 { 249 label = "Bootloader_Env"; 250 reg = <0x7d0000 0x10000>; 251 }; 252 }; 253 }; 254 255 PCI0: pci@ec000000 { 256 device_type = "pci"; 257 #interrupt-cells = <1>; 258 #size-cells = <2>; 259 #address-cells = <3>; 260 compatible = "ibm,plb405ep-pci", "ibm,plb-pci"; 261 primary; 262 reg = <0xeec00000 0x00000008 /* Config space access */ 263 0xeed80000 0x00000004 /* IACK */ 264 0xeed80000 0x00000004 /* Special cycle */ 265 0xef480000 0x00000040>; /* Internal registers */ 266 267 /* Outbound ranges, one memory and one IO, 268 * later cannot be changed. Chip supports a second 269 * IO range but we don't use it for now 270 */ 271 ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 272 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; 273 274 /* Inbound 2GB range starting at 0 */ 275 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; 276 277 interrupt-parent = <&UIC0>; 278 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 279 interrupt-map = < 280 /* IDSEL 3 -- slot1 (optional) 27/29 A/B IRQ2/4 */ 281 0x1800 0x0 0x0 0x1 &UIC0 0x1b 0x8 282 0x1800 0x0 0x0 0x2 &UIC0 0x1d 0x8 283 284 /* IDSEL 4 -- slot0, 26/28 A/B IRQ1/3 */ 285 0x2000 0x0 0x0 0x1 &UIC0 0x1a 0x8 286 0x2000 0x0 0x0 0x2 &UIC0 0x1c 0x8 287 >; 288 }; 289 }; 290 291 chosen { 292 linux,stdout-path = &UART0; 293 }; 294}; 295