1/*
2 * T1040/T1042 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2013-2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *     * Redistributions of source code must retain the above copyright
9 *	 notice, this list of conditions and the following disclaimer.
10 *     * Redistributions in binary form must reproduce the above copyright
11 *	 notice, this list of conditions and the following disclaimer in the
12 *	 documentation and/or other materials provided with the distribution.
13 *     * Neither the name of Freescale Semiconductor nor the
14 *	 names of its contributors may be used to endorse or promote products
15 *	 derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e5500_power_isa.dtsi"
38
39/ {
40	#address-cells = <2>;
41	#size-cells = <2>;
42	interrupt-parent = <&mpic>;
43
44	aliases {
45		ccsr = &soc;
46		dcsr = &dcsr;
47
48		serial0 = &serial0;
49		serial1 = &serial1;
50		serial2 = &serial2;
51		serial3 = &serial3;
52		pci0 = &pci0;
53		pci1 = &pci1;
54		pci2 = &pci2;
55		pci3 = &pci3;
56		usb0 = &usb0;
57		usb1 = &usb1;
58		sdhc = &sdhc;
59
60		crypto = &crypto;
61
62		fman0 = &fman0;
63		ethernet0 = &enet0;
64		ethernet1 = &enet1;
65		ethernet2 = &enet2;
66		ethernet3 = &enet3;
67		ethernet4 = &enet4;
68	};
69
70	cpus {
71		#address-cells = <1>;
72		#size-cells = <0>;
73
74		cpu0: PowerPC,e5500@0 {
75			device_type = "cpu";
76			reg = <0>;
77			clocks = <&mux0>;
78			next-level-cache = <&L2_1>;
79			#cooling-cells = <2>;
80			L2_1: l2-cache {
81				next-level-cache = <&cpc>;
82			};
83		};
84		cpu1: PowerPC,e5500@1 {
85			device_type = "cpu";
86			reg = <1>;
87			clocks = <&mux1>;
88			next-level-cache = <&L2_2>;
89			#cooling-cells = <2>;
90			L2_2: l2-cache {
91				next-level-cache = <&cpc>;
92			};
93		};
94		cpu2: PowerPC,e5500@2 {
95			device_type = "cpu";
96			reg = <2>;
97			clocks = <&mux2>;
98			next-level-cache = <&L2_3>;
99			#cooling-cells = <2>;
100			L2_3: l2-cache {
101				next-level-cache = <&cpc>;
102			};
103		};
104		cpu3: PowerPC,e5500@3 {
105			device_type = "cpu";
106			reg = <3>;
107			clocks = <&mux3>;
108			next-level-cache = <&L2_4>;
109			#cooling-cells = <2>;
110			L2_4: l2-cache {
111				next-level-cache = <&cpc>;
112			};
113		};
114	};
115};
116