1/*
2 * T1040 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *     * Redistributions of source code must retain the above copyright
9 *	 notice, this list of conditions and the following disclaimer.
10 *     * Redistributions in binary form must reproduce the above copyright
11 *	 notice, this list of conditions and the following disclaimer in the
12 *	 documentation and/or other materials provided with the distribution.
13 *     * Neither the name of Freescale Semiconductor nor the
14 *	 names of its contributors may be used to endorse or promote products
15 *	 derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&bman_fbpr {
36	compatible = "fsl,bman-fbpr";
37	alloc-ranges = <0 0 0x10000 0>;
38};
39
40&qman_fqd {
41	compatible = "fsl,qman-fqd";
42	alloc-ranges = <0 0 0x10000 0>;
43};
44
45&qman_pfdr {
46	compatible = "fsl,qman-pfdr";
47	alloc-ranges = <0 0 0x10000 0>;
48};
49
50&ifc {
51	#address-cells = <2>;
52	#size-cells = <1>;
53	compatible = "fsl,ifc", "simple-bus";
54	interrupts = <25 2 0 0>;
55};
56
57&pci0 {
58	compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
59	device_type = "pci";
60	#size-cells = <2>;
61	#address-cells = <3>;
62	bus-range = <0x0 0xff>;
63	interrupts = <20 2 0 0>;
64	fsl,iommu-parent = <&pamu0>;
65	pcie@0 {
66		reg = <0 0 0 0 0>;
67		#interrupt-cells = <1>;
68		#size-cells = <2>;
69		#address-cells = <3>;
70		device_type = "pci";
71		interrupts = <20 2 0 0>;
72		interrupt-map-mask = <0xf800 0 0 7>;
73		interrupt-map = <
74			/* IDSEL 0x0 */
75			0000 0 0 1 &mpic 40 1 0 0
76			0000 0 0 2 &mpic 1 1 0 0
77			0000 0 0 3 &mpic 2 1 0 0
78			0000 0 0 4 &mpic 3 1 0 0
79			>;
80	};
81};
82
83&pci1 {
84	compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
85	device_type = "pci";
86	#size-cells = <2>;
87	#address-cells = <3>;
88	bus-range = <0 0xff>;
89	interrupts = <21 2 0 0>;
90	fsl,iommu-parent = <&pamu0>;
91	pcie@0 {
92		reg = <0 0 0 0 0>;
93		#interrupt-cells = <1>;
94		#size-cells = <2>;
95		#address-cells = <3>;
96		device_type = "pci";
97		interrupts = <21 2 0 0>;
98		interrupt-map-mask = <0xf800 0 0 7>;
99		interrupt-map = <
100			/* IDSEL 0x0 */
101			0000 0 0 1 &mpic 41 1 0 0
102			0000 0 0 2 &mpic 5 1 0 0
103			0000 0 0 3 &mpic 6 1 0 0
104			0000 0 0 4 &mpic 7 1 0 0
105			>;
106	};
107};
108
109&pci2 {
110	compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
111	device_type = "pci";
112	#size-cells = <2>;
113	#address-cells = <3>;
114	bus-range = <0x0 0xff>;
115	interrupts = <22 2 0 0>;
116	fsl,iommu-parent = <&pamu0>;
117	pcie@0 {
118		reg = <0 0 0 0 0>;
119		#interrupt-cells = <1>;
120		#size-cells = <2>;
121		#address-cells = <3>;
122		device_type = "pci";
123		interrupts = <22 2 0 0>;
124		interrupt-map-mask = <0xf800 0 0 7>;
125		interrupt-map = <
126			/* IDSEL 0x0 */
127			0000 0 0 1 &mpic 42 1 0 0
128			0000 0 0 2 &mpic 9 1 0 0
129			0000 0 0 3 &mpic 10 1 0 0
130			0000 0 0 4 &mpic 11 1 0 0
131			>;
132	};
133};
134
135&pci3 {
136	compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
137	device_type = "pci";
138	#size-cells = <2>;
139	#address-cells = <3>;
140	bus-range = <0x0 0xff>;
141	interrupts = <23 2 0 0>;
142	fsl,iommu-parent = <&pamu0>;
143	pcie@0 {
144		reg = <0 0 0 0 0>;
145		#interrupt-cells = <1>;
146		#size-cells = <2>;
147		#address-cells = <3>;
148		device_type = "pci";
149		interrupts = <23 2 0 0>;
150		interrupt-map-mask = <0xf800 0 0 7>;
151		interrupt-map = <
152			/* IDSEL 0x0 */
153			0000 0 0 1 &mpic 43 1 0 0
154			0000 0 0 2 &mpic 0 1 0 0
155			0000 0 0 3 &mpic 4 1 0 0
156			0000 0 0 4 &mpic 8 1 0 0
157			>;
158	};
159};
160
161&dcsr {
162	#address-cells = <1>;
163	#size-cells = <1>;
164	compatible = "fsl,dcsr", "simple-bus";
165
166	dcsr-epu@0 {
167		compatible = "fsl,t1040-dcsr-epu", "fsl,dcsr-epu";
168		interrupts = <52 2 0 0
169			      84 2 0 0
170			      85 2 0 0>;
171		reg = <0x0 0x1000>;
172	};
173	dcsr-npc {
174		compatible = "fsl,t1040-dcsr-cnpc", "fsl,dcsr-cnpc";
175		reg = <0x1000 0x1000 0x1002000 0x10000>;
176	};
177	dcsr-nxc@2000 {
178		compatible = "fsl,dcsr-nxc";
179		reg = <0x2000 0x1000>;
180	};
181	dcsr-corenet {
182		compatible = "fsl,dcsr-corenet";
183		reg = <0x8000 0x1000 0x1A000 0x1000>;
184	};
185	dcsr-dpaa@9000 {
186		compatible = "fsl,t1040-dcsr-dpaa", "fsl,dcsr-dpaa";
187		reg = <0x9000 0x1000>;
188	};
189	dcsr-ocn@11000 {
190		compatible = "fsl,t1040-dcsr-ocn", "fsl,dcsr-ocn";
191		reg = <0x11000 0x1000>;
192	};
193	dcsr-ddr@12000 {
194		compatible = "fsl,dcsr-ddr";
195		dev-handle = <&ddr1>;
196		reg = <0x12000 0x1000>;
197	};
198	dcsr-nal@18000 {
199		compatible = "fsl,t1040-dcsr-nal", "fsl,dcsr-nal";
200		reg = <0x18000 0x1000>;
201	};
202	dcsr-rcpm@22000 {
203		compatible = "fsl,t1040-dcsr-rcpm", "fsl,dcsr-rcpm";
204		reg = <0x22000 0x1000>;
205	};
206	dcsr-snpc@30000 {
207		compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
208		reg = <0x30000 0x1000 0x1022000 0x10000>;
209	};
210	dcsr-snpc@31000 {
211		compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
212		reg = <0x31000 0x1000 0x1042000 0x10000>;
213	};
214	dcsr-cpu-sb-proxy@100000 {
215		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
216		cpu-handle = <&cpu0>;
217		reg = <0x100000 0x1000 0x101000 0x1000>;
218	};
219	dcsr-cpu-sb-proxy@108000 {
220		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
221		cpu-handle = <&cpu1>;
222		reg = <0x108000 0x1000 0x109000 0x1000>;
223	};
224	dcsr-cpu-sb-proxy@110000 {
225		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
226		cpu-handle = <&cpu2>;
227		reg = <0x110000 0x1000 0x111000 0x1000>;
228	};
229	dcsr-cpu-sb-proxy@118000 {
230		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
231		cpu-handle = <&cpu3>;
232		reg = <0x118000 0x1000 0x119000 0x1000>;
233	};
234};
235
236&bportals {
237	#address-cells = <0x1>;
238	#size-cells = <0x1>;
239	compatible = "simple-bus";
240
241	bman-portal@0 {
242		compatible = "fsl,bman-portal";
243		reg = <0x0 0x4000>, <0x1000000 0x1000>;
244		interrupts = <105 2 0 0>;
245	};
246	bman-portal@4000 {
247		compatible = "fsl,bman-portal";
248		reg = <0x4000 0x4000>, <0x1001000 0x1000>;
249		interrupts = <107 2 0 0>;
250	};
251	bman-portal@8000 {
252		compatible = "fsl,bman-portal";
253		reg = <0x8000 0x4000>, <0x1002000 0x1000>;
254		interrupts = <109 2 0 0>;
255	};
256	bman-portal@c000 {
257		compatible = "fsl,bman-portal";
258		reg = <0xc000 0x4000>, <0x1003000 0x1000>;
259		interrupts = <111 2 0 0>;
260	};
261	bman-portal@10000 {
262		compatible = "fsl,bman-portal";
263		reg = <0x10000 0x4000>, <0x1004000 0x1000>;
264		interrupts = <113 2 0 0>;
265	};
266	bman-portal@14000 {
267		compatible = "fsl,bman-portal";
268		reg = <0x14000 0x4000>, <0x1005000 0x1000>;
269		interrupts = <115 2 0 0>;
270	};
271	bman-portal@18000 {
272		compatible = "fsl,bman-portal";
273		reg = <0x18000 0x4000>, <0x1006000 0x1000>;
274		interrupts = <117 2 0 0>;
275	};
276	bman-portal@1c000 {
277		compatible = "fsl,bman-portal";
278		reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
279		interrupts = <119 2 0 0>;
280	};
281	bman-portal@20000 {
282		compatible = "fsl,bman-portal";
283		reg = <0x20000 0x4000>, <0x1008000 0x1000>;
284		interrupts = <121 2 0 0>;
285	};
286	bman-portal@24000 {
287		compatible = "fsl,bman-portal";
288		reg = <0x24000 0x4000>, <0x1009000 0x1000>;
289		interrupts = <123 2 0 0>;
290	};
291};
292
293&qportals {
294	#address-cells = <0x1>;
295	#size-cells = <0x1>;
296	compatible = "simple-bus";
297
298	qportal0: qman-portal@0 {
299		compatible = "fsl,qman-portal";
300		reg = <0x0 0x4000>, <0x1000000 0x1000>;
301		interrupts = <104 0x2 0 0>;
302		cell-index = <0x0>;
303	};
304	qportal1: qman-portal@4000 {
305		compatible = "fsl,qman-portal";
306		reg = <0x4000 0x4000>, <0x1001000 0x1000>;
307		interrupts = <106 0x2 0 0>;
308		cell-index = <0x1>;
309	};
310	qportal2: qman-portal@8000 {
311		compatible = "fsl,qman-portal";
312		reg = <0x8000 0x4000>, <0x1002000 0x1000>;
313		interrupts = <108 0x2 0 0>;
314		cell-index = <0x2>;
315	};
316	qportal3: qman-portal@c000 {
317		compatible = "fsl,qman-portal";
318		reg = <0xc000 0x4000>, <0x1003000 0x1000>;
319		interrupts = <110 0x2 0 0>;
320		cell-index = <0x3>;
321	};
322	qportal4: qman-portal@10000 {
323		compatible = "fsl,qman-portal";
324		reg = <0x10000 0x4000>, <0x1004000 0x1000>;
325		interrupts = <112 0x2 0 0>;
326		cell-index = <0x4>;
327	};
328	qportal5: qman-portal@14000 {
329		compatible = "fsl,qman-portal";
330		reg = <0x14000 0x4000>, <0x1005000 0x1000>;
331		interrupts = <114 0x2 0 0>;
332		cell-index = <0x5>;
333	};
334	qportal6: qman-portal@18000 {
335		compatible = "fsl,qman-portal";
336		reg = <0x18000 0x4000>, <0x1006000 0x1000>;
337		interrupts = <116 0x2 0 0>;
338		cell-index = <0x6>;
339	};
340	qportal7: qman-portal@1c000 {
341		compatible = "fsl,qman-portal";
342		reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
343		interrupts = <118 0x2 0 0>;
344		cell-index = <0x7>;
345	};
346	qportal8: qman-portal@20000 {
347		compatible = "fsl,qman-portal";
348		reg = <0x20000 0x4000>, <0x1008000 0x1000>;
349		interrupts = <120 0x2 0 0>;
350		cell-index = <0x8>;
351	};
352	qportal9: qman-portal@24000 {
353		compatible = "fsl,qman-portal";
354		reg = <0x24000 0x4000>, <0x1009000 0x1000>;
355		interrupts = <122 0x2 0 0>;
356		cell-index = <0x9>;
357	};
358};
359
360&soc {
361	#address-cells = <1>;
362	#size-cells = <1>;
363	device_type = "soc";
364	compatible = "simple-bus";
365
366	soc-sram-error {
367		compatible = "fsl,soc-sram-error";
368		interrupts = <16 2 1 29>;
369	};
370
371	corenet-law@0 {
372		compatible = "fsl,corenet-law";
373		reg = <0x0 0x1000>;
374		fsl,num-laws = <16>;
375	};
376
377	ddr1: memory-controller@8000 {
378		compatible = "fsl,qoriq-memory-controller-v5.0",
379				"fsl,qoriq-memory-controller";
380		reg = <0x8000 0x1000>;
381		interrupts = <16 2 1 23>;
382	};
383
384	cpc: l3-cache-controller@10000 {
385		compatible = "fsl,t1040-l3-cache-controller", "cache";
386		reg = <0x10000 0x1000>;
387		interrupts = <16 2 1 27>;
388	};
389
390	corenet-cf@18000 {
391		compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
392		reg = <0x18000 0x1000>;
393		interrupts = <16 2 1 31>;
394		fsl,ccf-num-csdids = <32>;
395		fsl,ccf-num-snoopids = <32>;
396	};
397
398	iommu@20000 {
399		compatible = "fsl,pamu-v1.0", "fsl,pamu";
400		reg = <0x20000 0x1000>;
401		ranges = <0 0x20000 0x1000>;
402		#address-cells = <1>;
403		#size-cells = <1>;
404		interrupts = <
405			24 2 0 0
406			16 2 1 30>;
407		pamu0: pamu@0 {
408			reg = <0 0x1000>;
409			fsl,primary-cache-geometry = <128 1>;
410			fsl,secondary-cache-geometry = <16 2>;
411		};
412	};
413
414/include/ "qoriq-mpic.dtsi"
415
416	guts: global-utilities@e0000 {
417		compatible = "fsl,t1040-device-config", "fsl,qoriq-device-config-2.0";
418		reg = <0xe0000 0xe00>;
419		fsl,has-rstcr;
420		fsl,liodn-bits = <12>;
421	};
422
423/include/ "qoriq-clockgen2.dtsi"
424	global-utilities@e1000 {
425		compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0";
426
427		mux0: mux0@0 {
428			#clock-cells = <0>;
429			reg = <0x0 4>;
430			compatible = "fsl,qoriq-core-mux-2.0";
431			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
432				 <&pll1 0>, <&pll1 1>, <&pll1 2>;
433			clock-names = "pll0", "pll0-div2", "pll1-div4",
434				"pll1", "pll1-div2", "pll1-div4";
435			clock-output-names = "cmux0";
436		};
437
438		mux1: mux1@20 {
439			#clock-cells = <0>;
440			reg = <0x20 4>;
441			compatible = "fsl,qoriq-core-mux-2.0";
442			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
443				 <&pll1 0>, <&pll1 1>, <&pll1 2>;
444			clock-names = "pll0", "pll0-div2", "pll1-div4",
445				"pll1", "pll1-div2", "pll1-div4";
446			clock-output-names = "cmux1";
447		};
448
449		mux2: mux2@40 {
450			#clock-cells = <0>;
451			reg = <0x40 4>;
452			compatible = "fsl,qoriq-core-mux-2.0";
453			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
454				 <&pll1 0>, <&pll1 1>, <&pll1 2>;
455			clock-names = "pll0", "pll0-div2", "pll1-div4",
456				"pll1", "pll1-div2", "pll1-div4";
457			clock-output-names = "cmux2";
458		};
459
460		mux3: mux3@60 {
461			#clock-cells = <0>;
462			reg = <0x60 4>;
463			compatible = "fsl,qoriq-core-mux-2.0";
464			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
465				 <&pll1 0>, <&pll1 1>, <&pll1 2>;
466			clock-names = "pll0_0", "pll0_1", "pll0_2",
467				"pll1_0", "pll1_1", "pll1_2";
468			clock-output-names = "cmux3";
469		};
470	};
471
472	rcpm: global-utilities@e2000 {
473		compatible = "fsl,t1040-rcpm", "fsl,qoriq-rcpm-2.0";
474		reg = <0xe2000 0x1000>;
475	};
476
477	sfp: sfp@e8000 {
478		compatible = "fsl,t1040-sfp";
479		reg	   = <0xe8000 0x1000>;
480	};
481
482	serdes: serdes@ea000 {
483		compatible = "fsl,t1040-serdes";
484		reg	   = <0xea000 0x4000>;
485	};
486
487	scfg: global-utilities@fc000 {
488		compatible = "fsl,t1040-scfg";
489		reg = <0xfc000 0x1000>;
490	};
491
492/include/ "elo3-dma-0.dtsi"
493/include/ "elo3-dma-1.dtsi"
494/include/ "qoriq-espi-0.dtsi"
495	spi@110000 {
496		fsl,espi-num-chipselects = <4>;
497	};
498
499/include/ "qoriq-esdhc-0.dtsi"
500	sdhc@114000 {
501		compatible = "fsl,t1040-esdhc", "fsl,esdhc";
502		fsl,iommu-parent = <&pamu0>;
503		fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
504		sdhci,auto-cmd12;
505	};
506/include/ "qoriq-i2c-0.dtsi"
507/include/ "qoriq-i2c-1.dtsi"
508/include/ "qoriq-duart-0.dtsi"
509/include/ "qoriq-duart-1.dtsi"
510/include/ "qoriq-gpio-0.dtsi"
511/include/ "qoriq-gpio-1.dtsi"
512/include/ "qoriq-gpio-2.dtsi"
513/include/ "qoriq-gpio-3.dtsi"
514/include/ "qoriq-usb2-mph-0.dtsi"
515		usb0: usb@210000 {
516			compatible = "fsl-usb2-mph-v2.4", "fsl-usb2-mph";
517			fsl,iommu-parent = <&pamu0>;
518			fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
519			phy_type = "utmi";
520			port0;
521		};
522/include/ "qoriq-usb2-dr-0.dtsi"
523		usb1: usb@211000 {
524			compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
525			fsl,iommu-parent = <&pamu0>;
526			fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
527			dr_mode = "host";
528			phy_type = "utmi";
529		};
530
531	display@180000 {
532		compatible = "fsl,t1040-diu", "fsl,diu";
533		reg = <0x180000 1000>;
534		interrupts = <74 2 0 0>;
535	};
536
537/include/ "qoriq-sata2-0.dtsi"
538	sata@220000 {
539		fsl,iommu-parent = <&pamu0>;
540		fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
541	};
542/include/ "qoriq-sata2-1.dtsi"
543	sata@221000 {
544		fsl,iommu-parent = <&pamu0>;
545		fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
546	};
547/include/ "qoriq-sec5.0-0.dtsi"
548/include/ "qoriq-qman3.dtsi"
549/include/ "qoriq-bman1.dtsi"
550};
551