156525200SKumar Gala/*
256525200SKumar Gala * PQ3 MPIC device tree stub [ controller @ offset 0x40000 ]
356525200SKumar Gala *
456525200SKumar Gala * Copyright 2011 Freescale Semiconductor Inc.
556525200SKumar Gala *
656525200SKumar Gala * Redistribution and use in source and binary forms, with or without
756525200SKumar Gala * modification, are permitted provided that the following conditions are met:
856525200SKumar Gala *     * Redistributions of source code must retain the above copyright
956525200SKumar Gala *       notice, this list of conditions and the following disclaimer.
1056525200SKumar Gala *     * Redistributions in binary form must reproduce the above copyright
1156525200SKumar Gala *       notice, this list of conditions and the following disclaimer in the
1256525200SKumar Gala *       documentation and/or other materials provided with the distribution.
1356525200SKumar Gala *     * Neither the name of Freescale Semiconductor nor the
1456525200SKumar Gala *       names of its contributors may be used to endorse or promote products
1556525200SKumar Gala *       derived from this software without specific prior written permission.
1656525200SKumar Gala *
1756525200SKumar Gala *
1856525200SKumar Gala * ALTERNATIVELY, this software may be distributed under the terms of the
1956525200SKumar Gala * GNU General Public License ("GPL") as published by the Free Software
2056525200SKumar Gala * Foundation, either version 2 of that License or (at your option) any
2156525200SKumar Gala * later version.
2256525200SKumar Gala *
2356525200SKumar Gala * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
2456525200SKumar Gala * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
2556525200SKumar Gala * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
2656525200SKumar Gala * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
2756525200SKumar Gala * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
2856525200SKumar Gala * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
2956525200SKumar Gala * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
3056525200SKumar Gala * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3156525200SKumar Gala * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
3256525200SKumar Gala * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3356525200SKumar Gala */
3456525200SKumar Gala
3556525200SKumar Galampic: pic@40000 {
3656525200SKumar Gala	interrupt-controller;
3756525200SKumar Gala	#address-cells = <0>;
3856525200SKumar Gala	#interrupt-cells = <4>;
3956525200SKumar Gala	reg = <0x40000 0x40000>;
4056525200SKumar Gala	compatible = "fsl,mpic";
4156525200SKumar Gala	device_type = "open-pic";
4298cca250SKyle Moffett	big-endian;
439ca163c8SKyle Moffett	single-cpu-affinity;
44c1b8d45dSKyle Moffett	last-interrupt-source = <255>;
4556525200SKumar Gala};
4656525200SKumar Gala
4756525200SKumar Galatimer@41100 {
4856525200SKumar Gala	compatible = "fsl,mpic-global-timer";
4956525200SKumar Gala	reg = <0x41100 0x100 0x41300 4>;
5056525200SKumar Gala	interrupts = <0 0 3 0
5156525200SKumar Gala		      1 0 3 0
5256525200SKumar Gala		      2 0 3 0
5356525200SKumar Gala		      3 0 3 0>;
5456525200SKumar Gala};
5556525200SKumar Gala
564351f30aSMingkai Humessage@41400 {
574351f30aSMingkai Hu	compatible = "fsl,mpic-v3.1-msgr";
584351f30aSMingkai Hu	reg = <0x41400 0x200>;
594351f30aSMingkai Hu	interrupts = <
604351f30aSMingkai Hu		0xb0 2 0 0
614351f30aSMingkai Hu		0xb1 2 0 0
624351f30aSMingkai Hu		0xb2 2 0 0
634351f30aSMingkai Hu		0xb3 2 0 0>;
644351f30aSMingkai Hu};
654351f30aSMingkai Hu
6656525200SKumar Galamsi@41600 {
6756525200SKumar Gala	compatible = "fsl,mpic-msi";
6856525200SKumar Gala	reg = <0x41600 0x80>;
6956525200SKumar Gala	msi-available-ranges = <0 0x100>;
7056525200SKumar Gala	interrupts = <
7156525200SKumar Gala		0xe0 0 0 0
7256525200SKumar Gala		0xe1 0 0 0
7356525200SKumar Gala		0xe2 0 0 0
7456525200SKumar Gala		0xe3 0 0 0
7556525200SKumar Gala		0xe4 0 0 0
7656525200SKumar Gala		0xe5 0 0 0
7756525200SKumar Gala		0xe6 0 0 0
7856525200SKumar Gala		0xe7 0 0 0>;
7956525200SKumar Gala};
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