1/* 2 * P2041/P2040 Silicon/SoC Device Tree Source (post include) 3 * 4 * Copyright 2011 Freescale Semiconductor Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35&lbc { 36 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; 37 interrupts = <25 2 0 0>; 38 #address-cells = <2>; 39 #size-cells = <1>; 40}; 41 42/* controller at 0x200000 */ 43&pci0 { 44 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; 45 device_type = "pci"; 46 #size-cells = <2>; 47 #address-cells = <3>; 48 bus-range = <0x0 0xff>; 49 clock-frequency = <33333333>; 50 interrupts = <16 2 1 15>; 51 fsl,iommu-parent = <&pamu0>; 52 fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */ 53 pcie@0 { 54 reg = <0 0 0 0 0>; 55 #interrupt-cells = <1>; 56 #size-cells = <2>; 57 #address-cells = <3>; 58 device_type = "pci"; 59 interrupts = <16 2 1 15>; 60 interrupt-map-mask = <0xf800 0 0 7>; 61 interrupt-map = < 62 /* IDSEL 0x0 */ 63 0000 0 0 1 &mpic 40 1 0 0 64 0000 0 0 2 &mpic 1 1 0 0 65 0000 0 0 3 &mpic 2 1 0 0 66 0000 0 0 4 &mpic 3 1 0 0 67 >; 68 }; 69}; 70 71/* controller at 0x201000 */ 72&pci1 { 73 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; 74 device_type = "pci"; 75 #size-cells = <2>; 76 #address-cells = <3>; 77 bus-range = <0 0xff>; 78 clock-frequency = <33333333>; 79 interrupts = <16 2 1 14>; 80 fsl,iommu-parent = <&pamu0>; 81 fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */ 82 pcie@0 { 83 reg = <0 0 0 0 0>; 84 #interrupt-cells = <1>; 85 #size-cells = <2>; 86 #address-cells = <3>; 87 device_type = "pci"; 88 interrupts = <16 2 1 14>; 89 interrupt-map-mask = <0xf800 0 0 7>; 90 interrupt-map = < 91 /* IDSEL 0x0 */ 92 0000 0 0 1 &mpic 41 1 0 0 93 0000 0 0 2 &mpic 5 1 0 0 94 0000 0 0 3 &mpic 6 1 0 0 95 0000 0 0 4 &mpic 7 1 0 0 96 >; 97 }; 98}; 99 100/* controller at 0x202000 */ 101&pci2 { 102 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; 103 device_type = "pci"; 104 #size-cells = <2>; 105 #address-cells = <3>; 106 bus-range = <0x0 0xff>; 107 clock-frequency = <33333333>; 108 interrupts = <16 2 1 13>; 109 fsl,iommu-parent = <&pamu0>; 110 fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */ 111 pcie@0 { 112 reg = <0 0 0 0 0>; 113 #interrupt-cells = <1>; 114 #size-cells = <2>; 115 #address-cells = <3>; 116 device_type = "pci"; 117 interrupts = <16 2 1 13>; 118 interrupt-map-mask = <0xf800 0 0 7>; 119 interrupt-map = < 120 /* IDSEL 0x0 */ 121 0000 0 0 1 &mpic 42 1 0 0 122 0000 0 0 2 &mpic 9 1 0 0 123 0000 0 0 3 &mpic 10 1 0 0 124 0000 0 0 4 &mpic 11 1 0 0 125 >; 126 }; 127}; 128 129&rio { 130 compatible = "fsl,srio"; 131 interrupts = <16 2 1 11>; 132 #address-cells = <2>; 133 #size-cells = <2>; 134 fsl,iommu-parent = <&pamu0>; 135 ranges; 136 137 port1 { 138 #address-cells = <2>; 139 #size-cells = <2>; 140 cell-index = <1>; 141 fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */ 142 }; 143 144 port2 { 145 #address-cells = <2>; 146 #size-cells = <2>; 147 cell-index = <2>; 148 fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */ 149 }; 150}; 151 152&dcsr { 153 #address-cells = <1>; 154 #size-cells = <1>; 155 compatible = "fsl,dcsr", "simple-bus"; 156 157 dcsr-epu@0 { 158 compatible = "fsl,p2041-dcsr-epu", "fsl,dcsr-epu"; 159 interrupts = <52 2 0 0 160 84 2 0 0 161 85 2 0 0>; 162 reg = <0x0 0x1000>; 163 }; 164 dcsr-npc { 165 compatible = "fsl,dcsr-npc"; 166 reg = <0x1000 0x1000 0x1000000 0x8000>; 167 }; 168 dcsr-nxc@2000 { 169 compatible = "fsl,dcsr-nxc"; 170 reg = <0x2000 0x1000>; 171 }; 172 dcsr-corenet { 173 compatible = "fsl,dcsr-corenet"; 174 reg = <0x8000 0x1000 0xB0000 0x1000>; 175 }; 176 dcsr-dpaa@9000 { 177 compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa"; 178 reg = <0x9000 0x1000>; 179 }; 180 dcsr-ocn@11000 { 181 compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn"; 182 reg = <0x11000 0x1000>; 183 }; 184 dcsr-ddr@12000 { 185 compatible = "fsl,dcsr-ddr"; 186 dev-handle = <&ddr1>; 187 reg = <0x12000 0x1000>; 188 }; 189 dcsr-nal@18000 { 190 compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal"; 191 reg = <0x18000 0x1000>; 192 }; 193 dcsr-rcpm@22000 { 194 compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm"; 195 reg = <0x22000 0x1000>; 196 }; 197 dcsr-cpu-sb-proxy@40000 { 198 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 199 cpu-handle = <&cpu0>; 200 reg = <0x40000 0x1000>; 201 }; 202 dcsr-cpu-sb-proxy@41000 { 203 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 204 cpu-handle = <&cpu1>; 205 reg = <0x41000 0x1000>; 206 }; 207 dcsr-cpu-sb-proxy@42000 { 208 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 209 cpu-handle = <&cpu2>; 210 reg = <0x42000 0x1000>; 211 }; 212 dcsr-cpu-sb-proxy@43000 { 213 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 214 cpu-handle = <&cpu3>; 215 reg = <0x43000 0x1000>; 216 }; 217}; 218 219&soc { 220 #address-cells = <1>; 221 #size-cells = <1>; 222 device_type = "soc"; 223 compatible = "simple-bus"; 224 225 soc-sram-error { 226 compatible = "fsl,soc-sram-error"; 227 interrupts = <16 2 1 29>; 228 }; 229 230 corenet-law@0 { 231 compatible = "fsl,corenet-law"; 232 reg = <0x0 0x1000>; 233 fsl,num-laws = <32>; 234 }; 235 236 ddr1: memory-controller@8000 { 237 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; 238 reg = <0x8000 0x1000>; 239 interrupts = <16 2 1 23>; 240 }; 241 242 cpc: l3-cache-controller@10000 { 243 compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; 244 reg = <0x10000 0x1000>; 245 interrupts = <16 2 1 27>; 246 }; 247 248 corenet-cf@18000 { 249 compatible = "fsl,corenet1-cf", "fsl,corenet-cf"; 250 reg = <0x18000 0x1000>; 251 interrupts = <16 2 1 31>; 252 fsl,ccf-num-csdids = <32>; 253 fsl,ccf-num-snoopids = <32>; 254 }; 255 256 iommu@20000 { 257 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 258 reg = <0x20000 0x4000>; /* for compatibility with older PAMU drivers */ 259 ranges = <0 0x20000 0x4000>; 260 #address-cells = <1>; 261 #size-cells = <1>; 262 interrupts = < 263 24 2 0 0 264 16 2 1 30>; 265 fsl,portid-mapping = <0x0f000000>; 266 267 pamu0: pamu@0 { 268 reg = <0 0x1000>; 269 fsl,primary-cache-geometry = <32 1>; 270 fsl,secondary-cache-geometry = <128 2>; 271 }; 272 273 pamu1: pamu@1000 { 274 reg = <0x1000 0x1000>; 275 fsl,primary-cache-geometry = <32 1>; 276 fsl,secondary-cache-geometry = <128 2>; 277 }; 278 279 pamu2: pamu@2000 { 280 reg = <0x2000 0x1000>; 281 fsl,primary-cache-geometry = <32 1>; 282 fsl,secondary-cache-geometry = <128 2>; 283 }; 284 285 pamu3: pamu@3000 { 286 reg = <0x3000 0x1000>; 287 fsl,primary-cache-geometry = <32 1>; 288 fsl,secondary-cache-geometry = <128 2>; 289 }; 290 }; 291 292/include/ "qoriq-mpic.dtsi" 293 294 guts: global-utilities@e0000 { 295 compatible = "fsl,qoriq-device-config-1.0"; 296 reg = <0xe0000 0xe00>; 297 fsl,has-rstcr; 298 #sleep-cells = <1>; 299 fsl,liodn-bits = <12>; 300 }; 301 302 pins: global-utilities@e0e00 { 303 compatible = "fsl,qoriq-pin-control-1.0"; 304 reg = <0xe0e00 0x200>; 305 #sleep-cells = <2>; 306 }; 307 308 clockgen: global-utilities@e1000 { 309 compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0"; 310 ranges = <0x0 0xe1000 0x1000>; 311 reg = <0xe1000 0x1000>; 312 clock-frequency = <0>; 313 #address-cells = <1>; 314 #size-cells = <1>; 315 316 sysclk: sysclk { 317 #clock-cells = <0>; 318 compatible = "fsl,qoriq-sysclk-1.0"; 319 clock-output-names = "sysclk"; 320 }; 321 322 pll0: pll0@800 { 323 #clock-cells = <1>; 324 reg = <0x800 0x4>; 325 compatible = "fsl,qoriq-core-pll-1.0"; 326 clocks = <&sysclk>; 327 clock-output-names = "pll0", "pll0-div2"; 328 }; 329 330 pll1: pll1@820 { 331 #clock-cells = <1>; 332 reg = <0x820 0x4>; 333 compatible = "fsl,qoriq-core-pll-1.0"; 334 clocks = <&sysclk>; 335 clock-output-names = "pll1", "pll1-div2"; 336 }; 337 338 mux0: mux0@0 { 339 #clock-cells = <0>; 340 reg = <0x0 0x4>; 341 compatible = "fsl,qoriq-core-mux-1.0"; 342 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; 343 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 344 clock-output-names = "cmux0"; 345 }; 346 347 mux1: mux1@20 { 348 #clock-cells = <0>; 349 reg = <0x20 0x4>; 350 compatible = "fsl,qoriq-core-mux-1.0"; 351 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; 352 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 353 clock-output-names = "cmux1"; 354 }; 355 356 mux2: mux2@40 { 357 #clock-cells = <0>; 358 reg = <0x40 0x4>; 359 compatible = "fsl,qoriq-core-mux-1.0"; 360 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; 361 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 362 }; 363 364 mux3: mux3@60 { 365 #clock-cells = <0>; 366 reg = <0x60 0x4>; 367 compatible = "fsl,qoriq-core-mux-1.0"; 368 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; 369 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 370 clock-output-names = "cmux3"; 371 }; 372 }; 373 374 rcpm: global-utilities@e2000 { 375 compatible = "fsl,qoriq-rcpm-1.0"; 376 reg = <0xe2000 0x1000>; 377 #sleep-cells = <1>; 378 }; 379 380 sfp: sfp@e8000 { 381 compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0"; 382 reg = <0xe8000 0x1000>; 383 }; 384 385 serdes: serdes@ea000 { 386 compatible = "fsl,p2041-serdes"; 387 reg = <0xea000 0x1000>; 388 }; 389 390/include/ "qoriq-dma-0.dtsi" 391 dma@100300 { 392 fsl,iommu-parent = <&pamu0>; 393 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */ 394 }; 395 396/include/ "qoriq-dma-1.dtsi" 397 dma@101300 { 398 fsl,iommu-parent = <&pamu0>; 399 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */ 400 }; 401 402/include/ "qoriq-espi-0.dtsi" 403 spi@110000 { 404 fsl,espi-num-chipselects = <4>; 405 }; 406 407/include/ "qoriq-esdhc-0.dtsi" 408 sdhc@114000 { 409 fsl,iommu-parent = <&pamu1>; 410 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */ 411 sdhci,auto-cmd12; 412 }; 413 414/include/ "qoriq-i2c-0.dtsi" 415/include/ "qoriq-i2c-1.dtsi" 416/include/ "qoriq-duart-0.dtsi" 417/include/ "qoriq-duart-1.dtsi" 418/include/ "qoriq-gpio-0.dtsi" 419/include/ "qoriq-usb2-mph-0.dtsi" 420 usb0: usb@210000 { 421 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; 422 phy_type = "utmi"; 423 fsl,iommu-parent = <&pamu1>; 424 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */ 425 port0; 426 }; 427 428/include/ "qoriq-usb2-dr-0.dtsi" 429 usb1: usb@211000 { 430 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; 431 fsl,iommu-parent = <&pamu1>; 432 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */ 433 dr_mode = "host"; 434 phy_type = "utmi"; 435 }; 436 437/include/ "qoriq-sata2-0.dtsi" 438 sata@220000 { 439 fsl,iommu-parent = <&pamu1>; 440 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */ 441 }; 442 443/include/ "qoriq-sata2-1.dtsi" 444 sata@221000 { 445 fsl,iommu-parent = <&pamu1>; 446 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */ 447 }; 448 449/include/ "qoriq-sec4.2-0.dtsi" 450crypto: crypto@300000 { 451 fsl,iommu-parent = <&pamu1>; 452 }; 453}; 454