17f9ce714SKumar Gala/* 27f9ce714SKumar Gala * P2020/P2010 Silicon/SoC Device Tree Source (post include) 37f9ce714SKumar Gala * 47f9ce714SKumar Gala * Copyright 2011 Freescale Semiconductor Inc. 57f9ce714SKumar Gala * 67f9ce714SKumar Gala * Redistribution and use in source and binary forms, with or without 77f9ce714SKumar Gala * modification, are permitted provided that the following conditions are met: 87f9ce714SKumar Gala * * Redistributions of source code must retain the above copyright 97f9ce714SKumar Gala * notice, this list of conditions and the following disclaimer. 107f9ce714SKumar Gala * * Redistributions in binary form must reproduce the above copyright 117f9ce714SKumar Gala * notice, this list of conditions and the following disclaimer in the 127f9ce714SKumar Gala * documentation and/or other materials provided with the distribution. 137f9ce714SKumar Gala * * Neither the name of Freescale Semiconductor nor the 147f9ce714SKumar Gala * names of its contributors may be used to endorse or promote products 157f9ce714SKumar Gala * derived from this software without specific prior written permission. 167f9ce714SKumar Gala * 177f9ce714SKumar Gala * 187f9ce714SKumar Gala * ALTERNATIVELY, this software may be distributed under the terms of the 197f9ce714SKumar Gala * GNU General Public License ("GPL") as published by the Free Software 207f9ce714SKumar Gala * Foundation, either version 2 of that License or (at your option) any 217f9ce714SKumar Gala * later version. 227f9ce714SKumar Gala * 237f9ce714SKumar Gala * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 247f9ce714SKumar Gala * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 257f9ce714SKumar Gala * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 267f9ce714SKumar Gala * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 277f9ce714SKumar Gala * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 287f9ce714SKumar Gala * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 297f9ce714SKumar Gala * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 307f9ce714SKumar Gala * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 317f9ce714SKumar Gala * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 327f9ce714SKumar Gala * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 337f9ce714SKumar Gala */ 347f9ce714SKumar Gala 357f9ce714SKumar Gala&lbc { 367f9ce714SKumar Gala #address-cells = <2>; 377f9ce714SKumar Gala #size-cells = <1>; 387f9ce714SKumar Gala compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus"; 397f9ce714SKumar Gala interrupts = <19 2 0 0>; 407f9ce714SKumar Gala}; 417f9ce714SKumar Gala 427f9ce714SKumar Gala/* controller at 0xa000 */ 437f9ce714SKumar Gala&pci0 { 447f9ce714SKumar Gala compatible = "fsl,mpc8548-pcie"; 457f9ce714SKumar Gala device_type = "pci"; 467f9ce714SKumar Gala #size-cells = <2>; 477f9ce714SKumar Gala #address-cells = <3>; 487f9ce714SKumar Gala bus-range = <0 255>; 497f9ce714SKumar Gala clock-frequency = <33333333>; 507f9ce714SKumar Gala interrupts = <26 2 0 0>; 517f9ce714SKumar Gala 527f9ce714SKumar Gala pcie@0 { 537f9ce714SKumar Gala reg = <0 0 0 0 0>; 547f9ce714SKumar Gala #interrupt-cells = <1>; 557f9ce714SKumar Gala #size-cells = <2>; 567f9ce714SKumar Gala #address-cells = <3>; 577f9ce714SKumar Gala device_type = "pci"; 587f9ce714SKumar Gala interrupts = <26 2 0 0>; 597f9ce714SKumar Gala interrupt-map-mask = <0xf800 0 0 7>; 607f9ce714SKumar Gala interrupt-map = < 617f9ce714SKumar Gala /* IDSEL 0x0 */ 627f9ce714SKumar Gala 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 637f9ce714SKumar Gala 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 647f9ce714SKumar Gala 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 657f9ce714SKumar Gala 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 667f9ce714SKumar Gala >; 677f9ce714SKumar Gala }; 687f9ce714SKumar Gala}; 697f9ce714SKumar Gala 707f9ce714SKumar Gala/* controller at 0x9000 */ 717f9ce714SKumar Gala&pci1 { 727f9ce714SKumar Gala compatible = "fsl,mpc8548-pcie"; 737f9ce714SKumar Gala device_type = "pci"; 747f9ce714SKumar Gala #size-cells = <2>; 757f9ce714SKumar Gala #address-cells = <3>; 767f9ce714SKumar Gala bus-range = <0 255>; 777f9ce714SKumar Gala clock-frequency = <33333333>; 787f9ce714SKumar Gala interrupts = <25 2 0 0>; 797f9ce714SKumar Gala 807f9ce714SKumar Gala pcie@0 { 817f9ce714SKumar Gala reg = <0 0 0 0 0>; 827f9ce714SKumar Gala #interrupt-cells = <1>; 837f9ce714SKumar Gala #size-cells = <2>; 847f9ce714SKumar Gala #address-cells = <3>; 857f9ce714SKumar Gala device_type = "pci"; 867f9ce714SKumar Gala interrupts = <25 2 0 0>; 877f9ce714SKumar Gala interrupt-map-mask = <0xf800 0 0 7>; 887f9ce714SKumar Gala 897f9ce714SKumar Gala interrupt-map = < 907f9ce714SKumar Gala /* IDSEL 0x0 */ 917f9ce714SKumar Gala 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 927f9ce714SKumar Gala 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 937f9ce714SKumar Gala 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 947f9ce714SKumar Gala 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 957f9ce714SKumar Gala >; 967f9ce714SKumar Gala }; 977f9ce714SKumar Gala}; 987f9ce714SKumar Gala 997f9ce714SKumar Gala/* controller at 0x8000 */ 1007f9ce714SKumar Gala&pci2 { 1017f9ce714SKumar Gala compatible = "fsl,mpc8548-pcie"; 1027f9ce714SKumar Gala device_type = "pci"; 1037f9ce714SKumar Gala #size-cells = <2>; 1047f9ce714SKumar Gala #address-cells = <3>; 1057f9ce714SKumar Gala bus-range = <0 255>; 1067f9ce714SKumar Gala clock-frequency = <33333333>; 1077f9ce714SKumar Gala interrupts = <24 2 0 0>; 1087f9ce714SKumar Gala 1097f9ce714SKumar Gala pcie@0 { 1107f9ce714SKumar Gala reg = <0 0 0 0 0>; 1117f9ce714SKumar Gala #interrupt-cells = <1>; 1127f9ce714SKumar Gala #size-cells = <2>; 1137f9ce714SKumar Gala #address-cells = <3>; 1147f9ce714SKumar Gala device_type = "pci"; 1157f9ce714SKumar Gala interrupts = <24 2 0 0>; 1167f9ce714SKumar Gala interrupt-map-mask = <0xf800 0 0 7>; 1177f9ce714SKumar Gala 1187f9ce714SKumar Gala interrupt-map = < 1197f9ce714SKumar Gala /* IDSEL 0x0 */ 1207f9ce714SKumar Gala 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 1217f9ce714SKumar Gala 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 1227f9ce714SKumar Gala 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 1237f9ce714SKumar Gala 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 1247f9ce714SKumar Gala >; 1257f9ce714SKumar Gala }; 1267f9ce714SKumar Gala}; 1277f9ce714SKumar Gala 1287f9ce714SKumar Gala&soc { 1297f9ce714SKumar Gala #address-cells = <1>; 1307f9ce714SKumar Gala #size-cells = <1>; 1317f9ce714SKumar Gala device_type = "soc"; 1327f9ce714SKumar Gala compatible = "fsl,p2020-immr", "simple-bus"; 1337f9ce714SKumar Gala bus-frequency = <0>; // Filled out by uboot. 1347f9ce714SKumar Gala 1357f9ce714SKumar Gala ecm-law@0 { 1367f9ce714SKumar Gala compatible = "fsl,ecm-law"; 1377f9ce714SKumar Gala reg = <0x0 0x1000>; 1387f9ce714SKumar Gala fsl,num-laws = <12>; 1397f9ce714SKumar Gala }; 1407f9ce714SKumar Gala 1417f9ce714SKumar Gala ecm@1000 { 1427f9ce714SKumar Gala compatible = "fsl,p2020-ecm", "fsl,ecm"; 1437f9ce714SKumar Gala reg = <0x1000 0x1000>; 1447f9ce714SKumar Gala interrupts = <17 2 0 0>; 1457f9ce714SKumar Gala }; 1467f9ce714SKumar Gala 1477f9ce714SKumar Gala memory-controller@2000 { 1487f9ce714SKumar Gala compatible = "fsl,p2020-memory-controller"; 1497f9ce714SKumar Gala reg = <0x2000 0x1000>; 1507f9ce714SKumar Gala interrupts = <18 2 0 0>; 1517f9ce714SKumar Gala }; 1527f9ce714SKumar Gala 1537f9ce714SKumar Gala/include/ "pq3-i2c-0.dtsi" 1547f9ce714SKumar Gala/include/ "pq3-i2c-1.dtsi" 1557f9ce714SKumar Gala/include/ "pq3-duart-0.dtsi" 1567f9ce714SKumar Gala/include/ "pq3-espi-0.dtsi" 1577f9ce714SKumar Gala spi0: spi@7000 { 1587f9ce714SKumar Gala fsl,espi-num-chipselects = <4>; 1597f9ce714SKumar Gala }; 1607f9ce714SKumar Gala 1617f9ce714SKumar Gala/include/ "pq3-dma-1.dtsi" 1627f9ce714SKumar Gala/include/ "pq3-gpio-0.dtsi" 1637f9ce714SKumar Gala 1647f9ce714SKumar Gala L2: l2-cache-controller@20000 { 1657f9ce714SKumar Gala compatible = "fsl,p2020-l2-cache-controller"; 1667f9ce714SKumar Gala reg = <0x20000 0x1000>; 1677f9ce714SKumar Gala cache-line-size = <32>; // 32 bytes 1687f9ce714SKumar Gala cache-size = <0x80000>; // L2,512K 1697f9ce714SKumar Gala interrupts = <16 2 0 0>; 1707f9ce714SKumar Gala }; 1717f9ce714SKumar Gala 1727f9ce714SKumar Gala/include/ "pq3-dma-0.dtsi" 1737f9ce714SKumar Gala/include/ "pq3-usb2-dr-0.dtsi" 1747f9ce714SKumar Gala/include/ "pq3-etsec1-0.dtsi" 1757f9ce714SKumar Gala/include/ "pq3-etsec1-timer-0.dtsi" 1767f9ce714SKumar Gala 1777f9ce714SKumar Gala ptp_clock@24e00 { 1787f9ce714SKumar Gala interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>; 1797f9ce714SKumar Gala }; 1807f9ce714SKumar Gala 1817f9ce714SKumar Gala 1827f9ce714SKumar Gala/include/ "pq3-etsec1-1.dtsi" 1837f9ce714SKumar Gala/include/ "pq3-etsec1-2.dtsi" 1847f9ce714SKumar Gala/include/ "pq3-esdhc-0.dtsi" 1857f9ce714SKumar Gala/include/ "pq3-sec3.1-0.dtsi" 1867f9ce714SKumar Gala/include/ "pq3-mpic.dtsi" 1877f9ce714SKumar Gala/include/ "pq3-mpic-timer-B.dtsi" 1887f9ce714SKumar Gala 1897f9ce714SKumar Gala global-utilities@e0000 { 1907f9ce714SKumar Gala compatible = "fsl,p2020-guts"; 1917f9ce714SKumar Gala reg = <0xe0000 0x1000>; 1927f9ce714SKumar Gala fsl,has-rstcr; 1937f9ce714SKumar Gala }; 1947f9ce714SKumar Gala}; 195