1/* 2 * P1023 RDB Device Tree Source 3 * 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc. 5 * 6 * Author: Chunhe Lan <Chunhe.Lan@freescale.com> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * * Neither the name of Freescale Semiconductor nor the 16 * names of its contributors may be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * 20 * ALTERNATIVELY, this software may be distributed under the terms of the 21 * GNU General Public License ("GPL") as published by the Free Software 22 * Foundation, either version 2 of that License or (at your option) any 23 * later version. 24 * 25 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 26 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 27 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 29 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 31 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 32 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37/include/ "p1023si-pre.dtsi" 38 39/ { 40 model = "fsl,P1023"; 41 compatible = "fsl,P1023RDB"; 42 #address-cells = <2>; 43 #size-cells = <2>; 44 interrupt-parent = <&mpic>; 45 46 memory { 47 device_type = "memory"; 48 }; 49 50 reserved-memory { 51 #address-cells = <2>; 52 #size-cells = <2>; 53 ranges; 54 55 bman_fbpr: bman-fbpr { 56 size = <0 0x1000000>; 57 alignment = <0 0x1000000>; 58 }; 59 qman_fqd: qman-fqd { 60 size = <0 0x400000>; 61 alignment = <0 0x400000>; 62 }; 63 qman_pfdr: qman-pfdr { 64 size = <0 0x2000000>; 65 alignment = <0 0x2000000>; 66 }; 67 }; 68 69 qportals: qman-portals@ff000000 { 70 ranges = <0x0 0xf 0xff000000 0x200000>; 71 }; 72 73 bportals: bman-portals@ff200000 { 74 ranges = <0x0 0xf 0xff200000 0x200000>; 75 }; 76 77 soc: soc@ff600000 { 78 ranges = <0x0 0x0 0xff600000 0x200000>; 79 80 i2c@3000 { 81 eeprom@53 { 82 compatible = "at24,24c04"; 83 reg = <0x53>; 84 }; 85 86 rtc@6f { 87 compatible = "microchip,mcp7941x"; 88 reg = <0x6f>; 89 }; 90 }; 91 92 usb@22000 { 93 dr_mode = "host"; 94 phy_type = "ulpi"; 95 }; 96 }; 97 98 lbc: localbus@ff605000 { 99 reg = <0 0xff605000 0 0x1000>; 100 101 /* NOR, NAND Flashes */ 102 ranges = <0x0 0x0 0x0 0xec000000 0x04000000 103 0x1 0x0 0x0 0xffa00000 0x08000000>; 104 105 nor@0,0 { 106 #address-cells = <1>; 107 #size-cells = <1>; 108 compatible = "cfi-flash"; 109 reg = <0x0 0x0 0x04000000>; 110 bank-width = <2>; 111 device-width = <1>; 112 113 partition@0 { 114 /* 48MB for Root File System */ 115 reg = <0x00000000 0x03000000>; 116 label = "NOR Root File System"; 117 }; 118 119 partition@3000000 { 120 /* 1MB for DTB Image */ 121 reg = <0x03000000 0x00100000>; 122 label = "NOR DTB Image"; 123 }; 124 125 partition@3100000 { 126 /* 14MB for Linux Kernel Image */ 127 reg = <0x03100000 0x00e00000>; 128 label = "NOR Linux Kernel Image"; 129 }; 130 131 partition@3f00000 { 132 /* This location must not be altered */ 133 /* 512KB for u-boot Bootloader Image */ 134 /* 512KB for u-boot Environment Variables */ 135 reg = <0x03f00000 0x00100000>; 136 label = "NOR U-Boot Image"; 137 read-only; 138 }; 139 }; 140 141 nand@1,0 { 142 #address-cells = <1>; 143 #size-cells = <1>; 144 compatible = "fsl,elbc-fcm-nand"; 145 reg = <0x1 0x0 0x40000>; 146 147 partition@0 { 148 /* This location must not be altered */ 149 /* 1MB for u-boot Bootloader Image */ 150 reg = <0x0 0x00100000>; 151 label = "NAND U-Boot Image"; 152 read-only; 153 }; 154 155 partition@100000 { 156 /* 1MB for DTB Image */ 157 reg = <0x00100000 0x00100000>; 158 label = "NAND DTB Image"; 159 }; 160 161 partition@200000 { 162 /* 14MB for Linux Kernel Image */ 163 reg = <0x00200000 0x00e00000>; 164 label = "NAND Linux Kernel Image"; 165 }; 166 167 partition@1000000 { 168 /* 96MB for Root File System Image */ 169 reg = <0x01000000 0x06000000>; 170 label = "NAND Root File System"; 171 }; 172 173 partition@7000000 { 174 /* 16MB for User Writable Area */ 175 reg = <0x07000000 0x01000000>; 176 label = "NAND Writable User area"; 177 }; 178 }; 179 }; 180 181 pci0: pcie@ff60a000 { 182 reg = <0 0xff60a000 0 0x1000>; 183 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 184 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 185 pcie@0 { 186 /* IRQ[0:3] are pulled up on board, set to active-low */ 187 interrupt-map-mask = <0xf800 0 0 7>; 188 interrupt-map = < 189 /* IDSEL 0x0 */ 190 0000 0 0 1 &mpic 0 1 0 0 191 0000 0 0 2 &mpic 1 1 0 0 192 0000 0 0 3 &mpic 2 1 0 0 193 0000 0 0 4 &mpic 3 1 0 0 194 >; 195 ranges = <0x2000000 0x0 0xc0000000 196 0x2000000 0x0 0xc0000000 197 0x0 0x20000000 198 199 0x1000000 0x0 0x0 200 0x1000000 0x0 0x0 201 0x0 0x100000>; 202 }; 203 }; 204 205 board_pci1: pci1: pcie@ff609000 { 206 reg = <0 0xff609000 0 0x1000>; 207 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 208 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; 209 pcie@0 { 210 /* 211 * IRQ[4:6] only for PCIe, set to active-high, 212 * IRQ[7] is pulled up on board, set to active-low 213 */ 214 interrupt-map-mask = <0xf800 0 0 7>; 215 interrupt-map = < 216 /* IDSEL 0x0 */ 217 0000 0 0 1 &mpic 4 2 0 0 218 0000 0 0 2 &mpic 5 2 0 0 219 0000 0 0 3 &mpic 6 2 0 0 220 0000 0 0 4 &mpic 7 1 0 0 221 >; 222 ranges = <0x2000000 0x0 0xa0000000 223 0x2000000 0x0 0xa0000000 224 0x0 0x20000000 225 226 0x1000000 0x0 0x0 227 0x1000000 0x0 0x0 228 0x0 0x100000>; 229 }; 230 }; 231 232 pci2: pcie@ff60b000 { 233 reg = <0 0xff60b000 0 0x1000>; 234 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 235 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; 236 pcie@0 { 237 /* 238 * IRQ[8:10] are pulled up on board, set to active-low 239 * IRQ[11] only for PCIe, set to active-high, 240 */ 241 interrupt-map-mask = <0xf800 0 0 7>; 242 interrupt-map = < 243 /* IDSEL 0x0 */ 244 0000 0 0 1 &mpic 8 1 0 0 245 0000 0 0 2 &mpic 9 1 0 0 246 0000 0 0 3 &mpic 10 1 0 0 247 0000 0 0 4 &mpic 11 2 0 0 248 >; 249 ranges = <0x2000000 0x0 0x80000000 250 0x2000000 0x0 0x80000000 251 0x0 0x20000000 252 253 0x1000000 0x0 0x0 254 0x1000000 0x0 0x0 255 0x0 0x100000>; 256 }; 257 }; 258}; 259 260/include/ "p1023si-post.dtsi" 261