1ab827d97SKumar Gala/*
2ab827d97SKumar Gala * P1022/P1013 Silicon/SoC Device Tree Source (post include)
3ab827d97SKumar Gala *
4ab827d97SKumar Gala * Copyright 2011 Freescale Semiconductor Inc.
5ab827d97SKumar Gala *
6ab827d97SKumar Gala * Redistribution and use in source and binary forms, with or without
7ab827d97SKumar Gala * modification, are permitted provided that the following conditions are met:
8ab827d97SKumar Gala *     * Redistributions of source code must retain the above copyright
9ab827d97SKumar Gala *       notice, this list of conditions and the following disclaimer.
10ab827d97SKumar Gala *     * Redistributions in binary form must reproduce the above copyright
11ab827d97SKumar Gala *       notice, this list of conditions and the following disclaimer in the
12ab827d97SKumar Gala *       documentation and/or other materials provided with the distribution.
13ab827d97SKumar Gala *     * Neither the name of Freescale Semiconductor nor the
14ab827d97SKumar Gala *       names of its contributors may be used to endorse or promote products
15ab827d97SKumar Gala *       derived from this software without specific prior written permission.
16ab827d97SKumar Gala *
17ab827d97SKumar Gala *
18ab827d97SKumar Gala * ALTERNATIVELY, this software may be distributed under the terms of the
19ab827d97SKumar Gala * GNU General Public License ("GPL") as published by the Free Software
20ab827d97SKumar Gala * Foundation, either version 2 of that License or (at your option) any
21ab827d97SKumar Gala * later version.
22ab827d97SKumar Gala *
23ab827d97SKumar Gala * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24ab827d97SKumar Gala * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25ab827d97SKumar Gala * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26ab827d97SKumar Gala * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27ab827d97SKumar Gala * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28ab827d97SKumar Gala * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29ab827d97SKumar Gala * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30ab827d97SKumar Gala * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31ab827d97SKumar Gala * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32ab827d97SKumar Gala * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33ab827d97SKumar Gala */
34ab827d97SKumar Gala
35ab827d97SKumar Gala&lbc {
36ab827d97SKumar Gala	#address-cells = <2>;
37ab827d97SKumar Gala	#size-cells = <1>;
384951896aSTimur Tabi	/*
394951896aSTimur Tabi	 * The localbus on the P1022 is not a simple-bus because of the eLBC
404951896aSTimur Tabi	 * pin muxing when the DIU is enabled.
414951896aSTimur Tabi	 */
424951896aSTimur Tabi	compatible = "fsl,p1022-elbc", "fsl,elbc";
43ab827d97SKumar Gala	interrupts = <19 2 0 0>;
44ab827d97SKumar Gala};
45ab827d97SKumar Gala
46ab827d97SKumar Gala/* controller at 0x9000 */
47ab827d97SKumar Gala&pci0 {
4814bdc913STimur Tabi	compatible = "fsl,mpc8548-pcie";
49ab827d97SKumar Gala	device_type = "pci";
50ab827d97SKumar Gala	#size-cells = <2>;
51ab827d97SKumar Gala	#address-cells = <3>;
52ab827d97SKumar Gala	bus-range = <0 255>;
53ab827d97SKumar Gala	clock-frequency = <33333333>;
54ab827d97SKumar Gala	interrupts = <16 2 0 0>;
55ab827d97SKumar Gala
56ab827d97SKumar Gala	pcie@0 {
57ab827d97SKumar Gala		reg = <0 0 0 0 0>;
58ab827d97SKumar Gala		#interrupt-cells = <1>;
59ab827d97SKumar Gala		#size-cells = <2>;
60ab827d97SKumar Gala		#address-cells = <3>;
61ab827d97SKumar Gala		device_type = "pci";
62ab827d97SKumar Gala		interrupts = <16 2 0 0>;
63ab827d97SKumar Gala		interrupt-map-mask = <0xf800 0 0 7>;
64ab827d97SKumar Gala		interrupt-map = <
65ab827d97SKumar Gala			/* IDSEL 0x0 */
66ab827d97SKumar Gala			0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
67ab827d97SKumar Gala			0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
68ab827d97SKumar Gala			0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
69ab827d97SKumar Gala			0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
70ab827d97SKumar Gala			>;
71ab827d97SKumar Gala	};
72ab827d97SKumar Gala};
73ab827d97SKumar Gala
74ab827d97SKumar Gala/* controller at 0xa000 */
75ab827d97SKumar Gala&pci1 {
7614bdc913STimur Tabi	compatible = "fsl,mpc8548-pcie";
77ab827d97SKumar Gala	device_type = "pci";
78ab827d97SKumar Gala	#size-cells = <2>;
79ab827d97SKumar Gala	#address-cells = <3>;
80ab827d97SKumar Gala	bus-range = <0 255>;
81ab827d97SKumar Gala	clock-frequency = <33333333>;
82ab827d97SKumar Gala	interrupts = <16 2 0 0>;
83ab827d97SKumar Gala
84ab827d97SKumar Gala	pcie@0 {
85ab827d97SKumar Gala		reg = <0 0 0 0 0>;
86ab827d97SKumar Gala		#interrupt-cells = <1>;
87ab827d97SKumar Gala		#size-cells = <2>;
88ab827d97SKumar Gala		#address-cells = <3>;
89ab827d97SKumar Gala		device_type = "pci";
90ab827d97SKumar Gala		interrupts = <16 2 0 0>;
91ab827d97SKumar Gala		interrupt-map-mask = <0xf800 0 0 7>;
92ab827d97SKumar Gala
93ab827d97SKumar Gala		interrupt-map = <
94ab827d97SKumar Gala			/* IDSEL 0x0 */
95ab827d97SKumar Gala			0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
96ab827d97SKumar Gala			0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
97ab827d97SKumar Gala			0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
98ab827d97SKumar Gala			0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
99ab827d97SKumar Gala			>;
100ab827d97SKumar Gala	};
101ab827d97SKumar Gala};
102ab827d97SKumar Gala
103ab827d97SKumar Gala/* controller at 0xb000 */
104ab827d97SKumar Gala&pci2 {
10514bdc913STimur Tabi	compatible = "fsl,mpc8548-pcie";
106ab827d97SKumar Gala	device_type = "pci";
107ab827d97SKumar Gala	#size-cells = <2>;
108ab827d97SKumar Gala	#address-cells = <3>;
109ab827d97SKumar Gala	bus-range = <0 255>;
110ab827d97SKumar Gala	clock-frequency = <33333333>;
111ab827d97SKumar Gala	interrupts = <16 2 0 0>;
112ab827d97SKumar Gala
113ab827d97SKumar Gala	pcie@0 {
114ab827d97SKumar Gala		reg = <0 0 0 0 0>;
115ab827d97SKumar Gala		#interrupt-cells = <1>;
116ab827d97SKumar Gala		#size-cells = <2>;
117ab827d97SKumar Gala		#address-cells = <3>;
118ab827d97SKumar Gala		device_type = "pci";
119ab827d97SKumar Gala		interrupts = <16 2 0 0>;
120ab827d97SKumar Gala		interrupt-map-mask = <0xf800 0 0 7>;
121ab827d97SKumar Gala
122ab827d97SKumar Gala		interrupt-map = <
123ab827d97SKumar Gala			/* IDSEL 0x0 */
124ab827d97SKumar Gala			0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
125ab827d97SKumar Gala			0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
126ab827d97SKumar Gala			0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
127ab827d97SKumar Gala			0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
128ab827d97SKumar Gala			>;
129ab827d97SKumar Gala	};
130ab827d97SKumar Gala};
131ab827d97SKumar Gala
132ab827d97SKumar Gala&soc {
133ab827d97SKumar Gala	#address-cells = <1>;
134ab827d97SKumar Gala	#size-cells = <1>;
135ab827d97SKumar Gala	device_type = "soc";
136ab827d97SKumar Gala	compatible = "fsl,p1022-immr", "simple-bus";
137ab827d97SKumar Gala	bus-frequency = <0>;		// Filled out by uboot.
138ab827d97SKumar Gala
139ab827d97SKumar Gala	ecm-law@0 {
140ab827d97SKumar Gala		compatible = "fsl,ecm-law";
141ab827d97SKumar Gala		reg = <0x0 0x1000>;
142ab827d97SKumar Gala		fsl,num-laws = <12>;
143ab827d97SKumar Gala	};
144ab827d97SKumar Gala
145ab827d97SKumar Gala	ecm@1000 {
146ab827d97SKumar Gala		compatible = "fsl,p1022-ecm", "fsl,ecm";
147ab827d97SKumar Gala		reg = <0x1000 0x1000>;
148ab827d97SKumar Gala		interrupts = <16 2 0 0>;
149ab827d97SKumar Gala	};
150ab827d97SKumar Gala
151ab827d97SKumar Gala	memory-controller@2000 {
152ab827d97SKumar Gala		compatible = "fsl,p1022-memory-controller";
153ab827d97SKumar Gala		reg = <0x2000 0x1000>;
154ab827d97SKumar Gala		interrupts = <16 2 0 0>;
155ab827d97SKumar Gala	};
156ab827d97SKumar Gala
157ab827d97SKumar Gala/include/ "pq3-i2c-0.dtsi"
158ab827d97SKumar Gala/include/ "pq3-i2c-1.dtsi"
159ab827d97SKumar Gala/include/ "pq3-duart-0.dtsi"
160ab827d97SKumar Gala/include/ "pq3-espi-0.dtsi"
161ab827d97SKumar Gala	spi@7000 {
162ab827d97SKumar Gala		fsl,espi-num-chipselects = <4>;
163ab827d97SKumar Gala	};
164ab827d97SKumar Gala
165ab827d97SKumar Gala/include/ "pq3-dma-1.dtsi"
166ab827d97SKumar Gala	dma@c300 {
167ab827d97SKumar Gala		dma00: dma-channel@0 {
168ab827d97SKumar Gala			compatible = "fsl,ssi-dma-channel";
169ab827d97SKumar Gala		};
170ab827d97SKumar Gala		dma01: dma-channel@80 {
171ab827d97SKumar Gala			compatible = "fsl,ssi-dma-channel";
172ab827d97SKumar Gala		};
173ab827d97SKumar Gala	};
174ab827d97SKumar Gala
175ab827d97SKumar Gala/include/ "pq3-gpio-0.dtsi"
176ab827d97SKumar Gala
177ab827d97SKumar Gala	display@10000 {
178ab827d97SKumar Gala		compatible = "fsl,diu", "fsl,p1022-diu";
179ab827d97SKumar Gala		reg = <0x10000 1000>;
180ab827d97SKumar Gala		interrupts = <64 2 0 0>;
181ab827d97SKumar Gala	};
182ab827d97SKumar Gala
183ab827d97SKumar Gala	ssi@15000 {
184ab827d97SKumar Gala		compatible = "fsl,mpc8610-ssi";
185ab827d97SKumar Gala		cell-index = <0>;
186ab827d97SKumar Gala		reg = <0x15000 0x100>;
187ab827d97SKumar Gala		interrupts = <75 2 0 0>;
188ab827d97SKumar Gala		fsl,playback-dma = <&dma00>;
189ab827d97SKumar Gala		fsl,capture-dma = <&dma01>;
190ab827d97SKumar Gala		fsl,fifo-depth = <15>;
191ab827d97SKumar Gala	};
192ab827d97SKumar Gala
193ab827d97SKumar Gala/include/ "pq3-sata2-0.dtsi"
194ab827d97SKumar Gala/include/ "pq3-sata2-1.dtsi"
195ab827d97SKumar Gala
196ab827d97SKumar Gala	L2: l2-cache-controller@20000 {
197ab827d97SKumar Gala		compatible = "fsl,p1022-l2-cache-controller";
198ab827d97SKumar Gala		reg = <0x20000 0x1000>;
199ab827d97SKumar Gala		cache-line-size = <32>;	// 32 bytes
200ab827d97SKumar Gala		cache-size = <0x40000>; // L2,256K
201ab827d97SKumar Gala		interrupts = <16 2 0 0>;
202ab827d97SKumar Gala	};
203ab827d97SKumar Gala
204ab827d97SKumar Gala/include/ "pq3-dma-0.dtsi"
205ab827d97SKumar Gala/include/ "pq3-usb2-dr-0.dtsi"
206465aceb8SRamneek Mehresh	usb@22000 {
207465aceb8SRamneek Mehresh		compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
208465aceb8SRamneek Mehresh	};
209ab827d97SKumar Gala/include/ "pq3-usb2-dr-1.dtsi"
210465aceb8SRamneek Mehresh	usb@23000 {
211465aceb8SRamneek Mehresh		compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
212465aceb8SRamneek Mehresh	};
213ab827d97SKumar Gala
214ab827d97SKumar Gala/include/ "pq3-esdhc-0.dtsi"
215ab827d97SKumar Gala	sdhc@2e000 {
216f8b5a318SJerry Huang		compatible = "fsl,p1022-esdhc", "fsl,esdhc";
217f8b5a318SJerry Huang		sdhci,auto-cmd12;
218ab827d97SKumar Gala	};
219ab827d97SKumar Gala
220ab827d97SKumar Gala/include/ "pq3-sec3.3-0.dtsi"
221ab827d97SKumar Gala/include/ "pq3-mpic.dtsi"
222ab827d97SKumar Gala/include/ "pq3-mpic-timer-B.dtsi"
223ab827d97SKumar Gala
224ab827d97SKumar Gala/include/ "pq3-etsec2-0.dtsi"
225ab827d97SKumar Gala	enet0: enet0_grp2: ethernet@b0000 {
226ab827d97SKumar Gala	};
227ab827d97SKumar Gala
228ab827d97SKumar Gala/include/ "pq3-etsec2-1.dtsi"
229ab827d97SKumar Gala	enet1: enet1_grp2: ethernet@b1000 {
230ab827d97SKumar Gala	};
231ab827d97SKumar Gala
232ab827d97SKumar Gala	global-utilities@e0000 {
233ab827d97SKumar Gala		compatible = "fsl,p1022-guts";
234ab827d97SKumar Gala		reg = <0xe0000 0x1000>;
235ab827d97SKumar Gala		fsl,has-rstcr;
236ab827d97SKumar Gala	};
237ab827d97SKumar Gala
238ab827d97SKumar Gala	power@e0070{
239ab827d97SKumar Gala		compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc";
240ab827d97SKumar Gala		reg = <0xe0070 0x20>;
241ab827d97SKumar Gala	};
242ab827d97SKumar Gala
243ab827d97SKumar Gala};
244ab827d97SKumar Gala
245ab827d97SKumar Gala/include/ "pq3-etsec2-grp2-0.dtsi"
246ab827d97SKumar Gala/include/ "pq3-etsec2-grp2-1.dtsi"
247