1/*
2 * GE SBC610 Device Tree Source
3 *
4 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute  it and/or modify it
7 * under  the terms of  the GNU General  Public License as published by the
8 * Free Software Foundation;  either version 2 of the  License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
19 */
20
21/include/ "mpc8641si-pre.dtsi"
22
23/ {
24	model = "GEF_SBC610";
25	compatible = "gef,sbc610";
26
27	memory {
28		device_type = "memory";
29		reg = <0x0 0x40000000>;	// set by uboot
30	};
31
32	lbc: localbus@fef05000 {
33		reg = <0xfef05000 0x1000>;
34
35		ranges = <0 0 0xff000000 0x01000000	// 16MB Boot flash
36			  1 0 0xe8000000 0x08000000	// Paged Flash 0
37			  2 0 0xe0000000 0x08000000	// Paged Flash 1
38			  3 0 0xfc100000 0x00020000	// NVRAM
39			  4 0 0xfc000000 0x00008000	// FPGA
40			  5 0 0xfc008000 0x00008000	// AFIX FPGA
41			  6 0 0xfd000000 0x00800000	// IO FPGA (8-bit)
42			  7 0 0xfd800000 0x00800000>;	// IO FPGA (32-bit)
43
44		/* flash@0,0 is a mirror of part of the memory in flash@1,0
45		flash@0,0 {
46			compatible = "gef,sbc610-firmware-mirror", "cfi-flash";
47			reg = <0x0 0x0 0x1000000>;
48			bank-width = <4>;
49			device-width = <2>;
50			#address-cells = <1>;
51			#size-cells = <1>;
52			partition@0 {
53				label = "firmware";
54				reg = <0x0 0x1000000>;
55				read-only;
56			};
57		};
58		*/
59
60		flash@1,0 {
61			compatible = "gef,sbc610-paged-flash", "cfi-flash";
62			reg = <0x1 0x0 0x8000000>;
63			bank-width = <4>;
64			device-width = <2>;
65			#address-cells = <1>;
66			#size-cells = <1>;
67			partition@0 {
68				label = "user";
69				reg = <0x0 0x7800000>;
70			};
71			partition@7800000 {
72				label = "firmware";
73				reg = <0x7800000 0x800000>;
74				read-only;
75			};
76		};
77
78		nvram@3,0 {
79			device_type = "nvram";
80			compatible = "simtek,stk14ca8";
81			reg = <0x3 0x0 0x20000>;
82		};
83
84		fpga@4,0 {
85			compatible = "gef,fpga-regs";
86			reg = <0x4 0x0 0x40>;
87		};
88
89		wdt@4,2000 {
90			compatible = "gef,fpga-wdt";
91			reg = <0x4 0x2000 0x8>;
92			interrupts = <0x1a 0x4>;
93			interrupt-parent = <&gef_pic>;
94		};
95		/* Second watchdog available, driver currently supports one.
96		wdt@4,2010 {
97			compatible = "gef,fpga-wdt";
98			reg = <0x4 0x2010 0x8>;
99			interrupts = <0x1b 0x4>;
100			interrupt-parent = <&gef_pic>;
101		};
102		*/
103		gef_pic: pic@4,4000 {
104			#interrupt-cells = <1>;
105			interrupt-controller;
106			compatible = "gef,fpga-pic";
107			reg = <0x4 0x4000 0x20>;
108			interrupts = <0x8 0x9 0 0>;
109
110		};
111		gef_gpio: gpio@7,14000 {
112			#gpio-cells = <2>;
113			compatible = "gef,sbc610-gpio";
114			reg = <0x7 0x14000 0x24>;
115			gpio-controller;
116		};
117	};
118
119	soc: soc@fef00000 {
120		ranges = <0x0 0xfef00000 0x00100000>;
121
122		i2c@3000 {
123			hwmon@48 {
124				compatible = "national,lm92";
125				reg = <0x48>;
126			};
127
128			hwmon@4c {
129				compatible = "adi,adt7461";
130				reg = <0x4c>;
131			};
132
133			rtc@51 {
134				compatible = "epson,rx8581";
135				reg = <0x00000051>;
136			};
137
138			eti@6b {
139				compatible = "dallas,ds1682";
140				reg = <0x6b>;
141			};
142		};
143
144		enet0: ethernet@24000 {
145			tbi-handle = <&tbi0>;
146			phy-handle = <&phy0>;
147			phy-connection-type = "gmii";
148		};
149
150		mdio@24520 {
151			phy0: ethernet-phy@0 {
152				interrupt-parent = <&gef_pic>;
153				interrupts = <0x9 0x4>;
154				reg = <1>;
155			};
156			phy2: ethernet-phy@2 {
157				interrupt-parent = <&gef_pic>;
158				interrupts = <0x8 0x4>;
159				reg = <3>;
160			};
161			tbi0: tbi-phy@11 {
162				reg = <0x11>;
163				device_type = "tbi-phy";
164			};
165		};
166
167		enet1: ethernet@26000 {
168			tbi-handle = <&tbi2>;
169			phy-handle = <&phy2>;
170			phy-connection-type = "gmii";
171		};
172
173		mdio@26520 {
174			tbi2: tbi-phy@11 {
175				reg = <0x11>;
176				device_type = "tbi-phy";
177			};
178		};
179
180		enet2: ethernet@25000 {
181			status = "disabled";
182		};
183
184		mdio@25520 {
185			status = "disabled";
186		};
187
188		enet3: ethernet@27000 {
189			status = "disabled";
190		};
191
192		mdio@27520 {
193			status = "disabled";
194		};
195	};
196
197	pci0: pcie@fef08000 {
198		reg = <0xfef08000 0x1000>;
199		ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
200			  0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
201
202		pcie@0 {
203			ranges = <0x02000000 0x0 0x80000000
204				  0x02000000 0x0 0x80000000
205				  0x0 0x40000000
206
207				  0x01000000 0x0 0x00000000
208				  0x01000000 0x0 0x00000000
209				  0x0 0x00400000>;
210		};
211	};
212
213	pci1: pcie@fef09000 {
214		status = "disabled";
215	};
216};
217
218/include/ "mpc8641si-post.dtsi"
219