1/*
2 * GE PPC9A Device Tree Source
3 *
4 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute  it and/or modify it
7 * under  the terms of  the GNU General  Public License as published by the
8 * Free Software Foundation;  either version 2 of the  License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts
19 */
20
21/include/ "mpc8641si-pre.dtsi"
22
23/ {
24	model = "GEF_PPC9A";
25	compatible = "gef,ppc9a";
26
27	memory {
28		device_type = "memory";
29		reg = <0x0 0x40000000>;	// set by uboot
30	};
31
32	lbc: localbus@fef05000 {
33		reg = <0xfef05000 0x1000>;
34
35		ranges = <0 0 0xff000000 0x01000000	// 16MB Boot flash
36			  1 0 0xe8000000 0x08000000	// Paged Flash 0
37			  2 0 0xe0000000 0x08000000	// Paged Flash 1
38			  3 0 0xfc100000 0x00020000	// NVRAM
39			  4 0 0xfc000000 0x00008000	// FPGA
40			  5 0 0xfc008000 0x00008000	// AFIX FPGA
41			  6 0 0xfd000000 0x00800000	// IO FPGA (8-bit)
42			  7 0 0xfd800000 0x00800000>;	// IO FPGA (32-bit)
43
44		/* flash@0,0 is a mirror of part of the memory in flash@1,0
45		flash@0,0 {
46			compatible = "gef,ppc9a-firmware-mirror", "cfi-flash";
47			reg = <0x0 0x0 0x1000000>;
48			bank-width = <4>;
49			device-width = <2>;
50			#address-cells = <1>;
51			#size-cells = <1>;
52			partition@0 {
53				label = "firmware";
54				reg = <0x0 0x1000000>;
55				read-only;
56			};
57		};
58		*/
59
60		flash@1,0 {
61			compatible = "gef,ppc9a-paged-flash", "cfi-flash";
62			reg = <0x1 0x0 0x8000000>;
63			bank-width = <4>;
64			device-width = <2>;
65			#address-cells = <1>;
66			#size-cells = <1>;
67			partition@0 {
68				label = "user";
69				reg = <0x0 0x7800000>;
70			};
71			partition@7800000 {
72				label = "firmware";
73				reg = <0x7800000 0x800000>;
74				read-only;
75			};
76		};
77
78		nvram@3,0 {
79			device_type = "nvram";
80			compatible = "simtek,stk14ca8";
81			reg = <0x3 0x0 0x20000>;
82		};
83
84		fpga@4,0 {
85			compatible = "gef,ppc9a-fpga-regs";
86			reg = <0x4 0x0 0x40>;
87		};
88
89		wdt@4,2000 {
90			compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
91				"gef,fpga-wdt";
92			reg = <0x4 0x2000 0x8>;
93			interrupts = <0x1a 0x4>;
94			interrupt-parent = <&gef_pic>;
95		};
96		/* Second watchdog available, driver currently supports one.
97		wdt@4,2010 {
98			compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
99				"gef,fpga-wdt";
100			reg = <0x4 0x2010 0x8>;
101			interrupts = <0x1b 0x4>;
102			interrupt-parent = <&gef_pic>;
103		};
104		*/
105		gef_pic: pic@4,4000 {
106			#interrupt-cells = <1>;
107			interrupt-controller;
108			compatible = "gef,ppc9a-fpga-pic", "gef,fpga-pic-1.00";
109			reg = <0x4 0x4000 0x20>;
110			interrupts = <0x8 0x9 0 0>;
111
112		};
113		gef_gpio: gpio@7,14000 {
114			#gpio-cells = <2>;
115			compatible = "gef,ppc9a-gpio", "gef,sbc610-gpio";
116			reg = <0x7 0x14000 0x24>;
117			gpio-controller;
118		};
119	};
120
121	soc: soc@fef00000 {
122		ranges = <0x0 0xfef00000 0x00100000>;
123
124		i2c@3000 {
125			hwmon@48 {
126				compatible = "national,lm92";
127				reg = <0x48>;
128			};
129
130			hwmon@4c {
131				compatible = "adi,adt7461";
132				reg = <0x4c>;
133			};
134
135			rtc@51 {
136				compatible = "epson,rx8581";
137				reg = <0x00000051>;
138			};
139
140			eti@6b {
141				compatible = "dallas,ds1682";
142				reg = <0x6b>;
143			};
144		};
145
146		enet0: ethernet@24000 {
147			tbi-handle = <&tbi0>;
148			phy-handle = <&phy0>;
149			phy-connection-type = "gmii";
150		};
151
152		mdio@24520 {
153			phy0: ethernet-phy@0 {
154				interrupt-parent = <&gef_pic>;
155				interrupts = <0x9 0x4>;
156				reg = <1>;
157			};
158			phy2: ethernet-phy@2 {
159				interrupt-parent = <&gef_pic>;
160				interrupts = <0x8 0x4>;
161				reg = <3>;
162			};
163			tbi0: tbi-phy@11 {
164				reg = <0x11>;
165				device_type = "tbi-phy";
166			};
167		};
168
169		enet1: ethernet@26000 {
170			tbi-handle = <&tbi2>;
171			phy-handle = <&phy2>;
172			phy-connection-type = "gmii";
173		};
174
175		mdio@26520 {
176			tbi2: tbi-phy@11 {
177				reg = <0x11>;
178				device_type = "tbi-phy";
179			};
180		};
181
182		enet2: ethernet@25000 {
183			status = "disabled";
184		};
185
186		mdio@25520 {
187			status = "disabled";
188		};
189
190		enet3: ethernet@27000 {
191			status = "disabled";
192		};
193
194		mdio@27520 {
195			status = "disabled";
196		};
197	};
198
199	pci0: pcie@fef08000 {
200		reg = <0xfef08000 0x1000>;
201		ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
202			  0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
203
204		pcie@0 {
205			ranges = <0x02000000 0x0 0x80000000
206				  0x02000000 0x0 0x80000000
207				  0x0 0x40000000
208
209				  0x01000000 0x0 0x00000000
210				  0x01000000 0x0 0x00000000
211				  0x0 0x00400000>;
212		};
213	};
214
215	pci1: pcie@fef09000 {
216		status = "disabled";
217	};
218};
219
220/include/ "mpc8641si-post.dtsi"
221