1/* 2 * Device Tree Source for AMCC Acadia (405EZ) 3 * 4 * Copyright IBM Corp. 2008 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. 9 */ 10 11/dts-v1/; 12 13/ { 14 #address-cells = <1>; 15 #size-cells = <1>; 16 model = "amcc,acadia"; 17 compatible = "amcc,acadia"; 18 dcr-parent = <&{/cpus/cpu@0}>; 19 20 aliases { 21 ethernet0 = &EMAC0; 22 serial0 = &UART0; 23 serial1 = &UART1; 24 }; 25 26 cpus { 27 #address-cells = <1>; 28 #size-cells = <0>; 29 30 cpu@0 { 31 device_type = "cpu"; 32 model = "PowerPC,405EZ"; 33 reg = <0x0>; 34 clock-frequency = <0>; /* Filled in by wrapper */ 35 timebase-frequency = <0>; /* Filled in by wrapper */ 36 i-cache-line-size = <32>; 37 d-cache-line-size = <32>; 38 i-cache-size = <16384>; 39 d-cache-size = <16384>; 40 dcr-controller; 41 dcr-access-method = "native"; 42 }; 43 }; 44 45 memory { 46 device_type = "memory"; 47 reg = <0x0 0x0>; /* Filled in by wrapper */ 48 }; 49 50 UIC0: interrupt-controller { 51 compatible = "ibm,uic-405ez", "ibm,uic"; 52 interrupt-controller; 53 dcr-reg = <0x0c0 0x009>; 54 cell-index = <0>; 55 #address-cells = <0>; 56 #size-cells = <0>; 57 #interrupt-cells = <2>; 58 }; 59 60 plb { 61 compatible = "ibm,plb-405ez", "ibm,plb3"; 62 #address-cells = <1>; 63 #size-cells = <1>; 64 ranges; 65 clock-frequency = <0>; /* Filled in by wrapper */ 66 67 MAL0: mcmal { 68 compatible = "ibm,mcmal-405ez", "ibm,mcmal"; 69 dcr-reg = <0x380 0x62>; 70 num-tx-chans = <1>; 71 num-rx-chans = <1>; 72 interrupt-parent = <&UIC0>; 73 /* 405EZ has only 3 interrupts to the UIC, as 74 * SERR, TXDE, and RXDE are or'd together into 75 * one UIC bit 76 */ 77 interrupts = < 78 0x13 0x4 /* TXEOB */ 79 0x15 0x4 /* RXEOB */ 80 0x12 0x4 /* SERR, TXDE, RXDE */>; 81 }; 82 83 POB0: opb { 84 compatible = "ibm,opb-405ez", "ibm,opb"; 85 #address-cells = <1>; 86 #size-cells = <1>; 87 ranges; 88 dcr-reg = <0x0a 0x05>; 89 clock-frequency = <0>; /* Filled in by wrapper */ 90 91 UART0: serial@ef600300 { 92 device_type = "serial"; 93 compatible = "ns16550"; 94 reg = <0xef600300 0x8>; 95 virtual-reg = <0xef600300>; 96 clock-frequency = <0>; /* Filled in by wrapper */ 97 current-speed = <115200>; 98 interrupt-parent = <&UIC0>; 99 interrupts = <0x5 0x4>; 100 }; 101 102 UART1: serial@ef600400 { 103 device_type = "serial"; 104 compatible = "ns16550"; 105 reg = <0xef600400 0x8>; 106 clock-frequency = <0>; /* Filled in by wrapper */ 107 current-speed = <115200>; 108 interrupt-parent = <&UIC0>; 109 interrupts = <0x6 0x4>; 110 }; 111 112 IIC: i2c@ef600500 { 113 compatible = "ibm,iic-405ez", "ibm,iic"; 114 reg = <0xef600500 0x11>; 115 interrupt-parent = <&UIC0>; 116 interrupts = <0xa 0x4>; 117 }; 118 119 GPIO0: gpio@ef600700 { 120 compatible = "ibm,gpio-405ez"; 121 reg = <0xef600700 0x20>; 122 }; 123 124 GPIO1: gpio@ef600800 { 125 compatible = "ibm,gpio-405ez"; 126 reg = <0xef600800 0x20>; 127 }; 128 129 EMAC0: ethernet@ef600900 { 130 device_type = "network"; 131 compatible = "ibm,emac-405ez", "ibm,emac"; 132 interrupt-parent = <&UIC0>; 133 interrupts = < 134 0x10 0x4 /* Ethernet */ 135 0x11 0x4 /* Ethernet Wake up */>; 136 local-mac-address = [000000000000]; /* Filled in by wrapper */ 137 reg = <0xef600900 0x70>; 138 mal-device = <&MAL0>; 139 mal-tx-channel = <0>; 140 mal-rx-channel = <0>; 141 cell-index = <0>; 142 max-frame-size = <1500>; 143 rx-fifo-size = <4096>; 144 tx-fifo-size = <2048>; 145 phy-mode = "mii"; 146 phy-map = <0x0>; 147 }; 148 149 CAN0: can@ef601000 { 150 compatible = "amcc,can-405ez"; 151 reg = <0xef601000 0x620>; 152 interrupt-parent = <&UIC0>; 153 interrupts = <0x7 0x4>; 154 }; 155 156 CAN1: can@ef601800 { 157 compatible = "amcc,can-405ez"; 158 reg = <0xef601800 0x620>; 159 interrupt-parent = <&UIC0>; 160 interrupts = <0x8 0x4>; 161 }; 162 163 cameleon@ef602000 { 164 compatible = "amcc,cameleon-405ez"; 165 reg = <0xef602000 0x800>; 166 interrupt-parent = <&UIC0>; 167 interrupts = <0xb 0x4 0xc 0x4>; 168 }; 169 170 ieee1588@ef602800 { 171 compatible = "amcc,ieee1588-405ez"; 172 reg = <0xef602800 0x60>; 173 interrupt-parent = <&UIC0>; 174 interrupts = <0x4 0x4>; 175 /* This thing is a bit weird. It has it's own UIC 176 * that it uses to generate snapshot triggers. We 177 * don't really support this device yet, and it needs 178 * work to figure this out. 179 */ 180 dcr-reg = <0xe0 0x9>; 181 }; 182 183 usb@ef603000 { 184 compatible = "ohci-be"; 185 reg = <0xef603000 0x80>; 186 interrupt-parent = <&UIC0>; 187 interrupts = <0xd 0x4 0xe 0x4>; 188 }; 189 190 dac@ef603300 { 191 compatible = "amcc,dac-405ez"; 192 reg = <0xef603300 0x40>; 193 interrupt-parent = <&UIC0>; 194 interrupts = <0x18 0x4>; 195 }; 196 197 adc@ef603400 { 198 compatible = "amcc,adc-405ez"; 199 reg = <0xef603400 0x40>; 200 interrupt-parent = <&UIC0>; 201 interrupts = <0x17 0x4>; 202 }; 203 204 spi@ef603500 { 205 compatible = "amcc,spi-405ez"; 206 reg = <0xef603500 0x100>; 207 interrupt-parent = <&UIC0>; 208 interrupts = <0x9 0x4>; 209 }; 210 }; 211 212 EBC0: ebc { 213 compatible = "ibm,ebc-405ez", "ibm,ebc"; 214 dcr-reg = <0x12 0x2>; 215 #address-cells = <2>; 216 #size-cells = <1>; 217 clock-frequency = <0>; /* Filled in by wrapper */ 218 }; 219 }; 220 221 chosen { 222 stdout-path = "/plb/opb/serial@ef600300"; 223 }; 224}; 225