1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * 7 * Copyright (C) 1995, 1996, 1997, 1998 by Ralf Baechle 8 * Copyright 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org) 9 * Copyright 1999 Hewlett Packard Co. 10 * 11 */ 12 13 #include <linux/mm.h> 14 #include <linux/ptrace.h> 15 #include <linux/sched.h> 16 #include <linux/sched/debug.h> 17 #include <linux/interrupt.h> 18 #include <linux/extable.h> 19 #include <linux/uaccess.h> 20 21 #include <asm/traps.h> 22 23 /* Various important other fields */ 24 #define bit22set(x) (x & 0x00000200) 25 #define bits23_25set(x) (x & 0x000001c0) 26 #define isGraphicsFlushRead(x) ((x & 0xfc003fdf) == 0x04001a80) 27 /* extended opcode is 0x6a */ 28 29 #define BITSSET 0x1c0 /* for identifying LDCW */ 30 31 32 int show_unhandled_signals = 1; 33 34 /* 35 * parisc_acctyp(unsigned int inst) -- 36 * Given a PA-RISC memory access instruction, determine if the 37 * the instruction would perform a memory read or memory write 38 * operation. 39 * 40 * This function assumes that the given instruction is a memory access 41 * instruction (i.e. you should really only call it if you know that 42 * the instruction has generated some sort of a memory access fault). 43 * 44 * Returns: 45 * VM_READ if read operation 46 * VM_WRITE if write operation 47 * VM_EXEC if execute operation 48 */ 49 static unsigned long 50 parisc_acctyp(unsigned long code, unsigned int inst) 51 { 52 if (code == 6 || code == 16) 53 return VM_EXEC; 54 55 switch (inst & 0xf0000000) { 56 case 0x40000000: /* load */ 57 case 0x50000000: /* new load */ 58 return VM_READ; 59 60 case 0x60000000: /* store */ 61 case 0x70000000: /* new store */ 62 return VM_WRITE; 63 64 case 0x20000000: /* coproc */ 65 case 0x30000000: /* coproc2 */ 66 if (bit22set(inst)) 67 return VM_WRITE; 68 69 case 0x0: /* indexed/memory management */ 70 if (bit22set(inst)) { 71 /* 72 * Check for the 'Graphics Flush Read' instruction. 73 * It resembles an FDC instruction, except for bits 74 * 20 and 21. Any combination other than zero will 75 * utilize the block mover functionality on some 76 * older PA-RISC platforms. The case where a block 77 * move is performed from VM to graphics IO space 78 * should be treated as a READ. 79 * 80 * The significance of bits 20,21 in the FDC 81 * instruction is: 82 * 83 * 00 Flush data cache (normal instruction behavior) 84 * 01 Graphics flush write (IO space -> VM) 85 * 10 Graphics flush read (VM -> IO space) 86 * 11 Graphics flush read/write (VM <-> IO space) 87 */ 88 if (isGraphicsFlushRead(inst)) 89 return VM_READ; 90 return VM_WRITE; 91 } else { 92 /* 93 * Check for LDCWX and LDCWS (semaphore instructions). 94 * If bits 23 through 25 are all 1's it is one of 95 * the above two instructions and is a write. 96 * 97 * Note: With the limited bits we are looking at, 98 * this will also catch PROBEW and PROBEWI. However, 99 * these should never get in here because they don't 100 * generate exceptions of the type: 101 * Data TLB miss fault/data page fault 102 * Data memory protection trap 103 */ 104 if (bits23_25set(inst) == BITSSET) 105 return VM_WRITE; 106 } 107 return VM_READ; /* Default */ 108 } 109 return VM_READ; /* Default */ 110 } 111 112 #undef bit22set 113 #undef bits23_25set 114 #undef isGraphicsFlushRead 115 #undef BITSSET 116 117 118 #if 0 119 /* This is the treewalk to find a vma which is the highest that has 120 * a start < addr. We're using find_vma_prev instead right now, but 121 * we might want to use this at some point in the future. Probably 122 * not, but I want it committed to CVS so I don't lose it :-) 123 */ 124 while (tree != vm_avl_empty) { 125 if (tree->vm_start > addr) { 126 tree = tree->vm_avl_left; 127 } else { 128 prev = tree; 129 if (prev->vm_next == NULL) 130 break; 131 if (prev->vm_next->vm_start > addr) 132 break; 133 tree = tree->vm_avl_right; 134 } 135 } 136 #endif 137 138 int fixup_exception(struct pt_regs *regs) 139 { 140 const struct exception_table_entry *fix; 141 142 fix = search_exception_tables(regs->iaoq[0]); 143 if (fix) { 144 /* 145 * Fix up get_user() and put_user(). 146 * ASM_EXCEPTIONTABLE_ENTRY_EFAULT() sets the least-significant 147 * bit in the relative address of the fixup routine to indicate 148 * that %r8 should be loaded with -EFAULT to report a userspace 149 * access error. 150 */ 151 if (fix->fixup & 1) { 152 regs->gr[8] = -EFAULT; 153 154 /* zero target register for get_user() */ 155 if (parisc_acctyp(0, regs->iir) == VM_READ) { 156 int treg = regs->iir & 0x1f; 157 BUG_ON(treg == 0); 158 regs->gr[treg] = 0; 159 } 160 } 161 162 regs->iaoq[0] = (unsigned long)&fix->fixup + fix->fixup; 163 regs->iaoq[0] &= ~3; 164 /* 165 * NOTE: In some cases the faulting instruction 166 * may be in the delay slot of a branch. We 167 * don't want to take the branch, so we don't 168 * increment iaoq[1], instead we set it to be 169 * iaoq[0]+4, and clear the B bit in the PSW 170 */ 171 regs->iaoq[1] = regs->iaoq[0] + 4; 172 regs->gr[0] &= ~PSW_B; /* IPSW in gr[0] */ 173 174 return 1; 175 } 176 177 return 0; 178 } 179 180 /* 181 * parisc hardware trap list 182 * 183 * Documented in section 3 "Addressing and Access Control" of the 184 * "PA-RISC 1.1 Architecture and Instruction Set Reference Manual" 185 * https://parisc.wiki.kernel.org/index.php/File:Pa11_acd.pdf 186 * 187 * For implementation see handle_interruption() in traps.c 188 */ 189 static const char * const trap_description[] = { 190 [1] "High-priority machine check (HPMC)", 191 [2] "Power failure interrupt", 192 [3] "Recovery counter trap", 193 [5] "Low-priority machine check", 194 [6] "Instruction TLB miss fault", 195 [7] "Instruction access rights / protection trap", 196 [8] "Illegal instruction trap", 197 [9] "Break instruction trap", 198 [10] "Privileged operation trap", 199 [11] "Privileged register trap", 200 [12] "Overflow trap", 201 [13] "Conditional trap", 202 [14] "FP Assist Exception trap", 203 [15] "Data TLB miss fault", 204 [16] "Non-access ITLB miss fault", 205 [17] "Non-access DTLB miss fault", 206 [18] "Data memory protection/unaligned access trap", 207 [19] "Data memory break trap", 208 [20] "TLB dirty bit trap", 209 [21] "Page reference trap", 210 [22] "Assist emulation trap", 211 [25] "Taken branch trap", 212 [26] "Data memory access rights trap", 213 [27] "Data memory protection ID trap", 214 [28] "Unaligned data reference trap", 215 }; 216 217 const char *trap_name(unsigned long code) 218 { 219 const char *t = NULL; 220 221 if (code < ARRAY_SIZE(trap_description)) 222 t = trap_description[code]; 223 224 return t ? t : "Unknown trap"; 225 } 226 227 /* 228 * Print out info about fatal segfaults, if the show_unhandled_signals 229 * sysctl is set: 230 */ 231 static inline void 232 show_signal_msg(struct pt_regs *regs, unsigned long code, 233 unsigned long address, struct task_struct *tsk, 234 struct vm_area_struct *vma) 235 { 236 if (!unhandled_signal(tsk, SIGSEGV)) 237 return; 238 239 if (!printk_ratelimit()) 240 return; 241 242 pr_warn("\n"); 243 pr_warn("do_page_fault() command='%s' type=%lu address=0x%08lx", 244 tsk->comm, code, address); 245 print_vma_addr(KERN_CONT " in ", regs->iaoq[0]); 246 247 pr_cont("\ntrap #%lu: %s%c", code, trap_name(code), 248 vma ? ',':'\n'); 249 250 if (vma) 251 pr_cont(" vm_start = 0x%08lx, vm_end = 0x%08lx\n", 252 vma->vm_start, vma->vm_end); 253 254 show_regs(regs); 255 } 256 257 void do_page_fault(struct pt_regs *regs, unsigned long code, 258 unsigned long address) 259 { 260 struct vm_area_struct *vma, *prev_vma; 261 struct task_struct *tsk; 262 struct mm_struct *mm; 263 unsigned long acc_type; 264 int fault; 265 unsigned int flags; 266 267 if (faulthandler_disabled()) 268 goto no_context; 269 270 tsk = current; 271 mm = tsk->mm; 272 if (!mm) 273 goto no_context; 274 275 flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE; 276 if (user_mode(regs)) 277 flags |= FAULT_FLAG_USER; 278 279 acc_type = parisc_acctyp(code, regs->iir); 280 if (acc_type & VM_WRITE) 281 flags |= FAULT_FLAG_WRITE; 282 retry: 283 down_read(&mm->mmap_sem); 284 vma = find_vma_prev(mm, address, &prev_vma); 285 if (!vma || address < vma->vm_start) 286 goto check_expansion; 287 /* 288 * Ok, we have a good vm_area for this memory access. We still need to 289 * check the access permissions. 290 */ 291 292 good_area: 293 294 if ((vma->vm_flags & acc_type) != acc_type) 295 goto bad_area; 296 297 /* 298 * If for any reason at all we couldn't handle the fault, make 299 * sure we exit gracefully rather than endlessly redo the 300 * fault. 301 */ 302 303 fault = handle_mm_fault(vma, address, flags); 304 305 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current)) 306 return; 307 308 if (unlikely(fault & VM_FAULT_ERROR)) { 309 /* 310 * We hit a shared mapping outside of the file, or some 311 * other thing happened to us that made us unable to 312 * handle the page fault gracefully. 313 */ 314 if (fault & VM_FAULT_OOM) 315 goto out_of_memory; 316 else if (fault & VM_FAULT_SIGSEGV) 317 goto bad_area; 318 else if (fault & VM_FAULT_SIGBUS) 319 goto bad_area; 320 BUG(); 321 } 322 if (flags & FAULT_FLAG_ALLOW_RETRY) { 323 if (fault & VM_FAULT_MAJOR) 324 current->maj_flt++; 325 else 326 current->min_flt++; 327 if (fault & VM_FAULT_RETRY) { 328 flags &= ~FAULT_FLAG_ALLOW_RETRY; 329 330 /* 331 * No need to up_read(&mm->mmap_sem) as we would 332 * have already released it in __lock_page_or_retry 333 * in mm/filemap.c. 334 */ 335 336 goto retry; 337 } 338 } 339 up_read(&mm->mmap_sem); 340 return; 341 342 check_expansion: 343 vma = prev_vma; 344 if (vma && (expand_stack(vma, address) == 0)) 345 goto good_area; 346 347 /* 348 * Something tried to access memory that isn't in our memory map.. 349 */ 350 bad_area: 351 up_read(&mm->mmap_sem); 352 353 if (user_mode(regs)) { 354 struct siginfo si; 355 356 show_signal_msg(regs, code, address, tsk, vma); 357 358 switch (code) { 359 case 15: /* Data TLB miss fault/Data page fault */ 360 /* send SIGSEGV when outside of vma */ 361 if (!vma || 362 address < vma->vm_start || address >= vma->vm_end) { 363 si.si_signo = SIGSEGV; 364 si.si_code = SEGV_MAPERR; 365 break; 366 } 367 368 /* send SIGSEGV for wrong permissions */ 369 if ((vma->vm_flags & acc_type) != acc_type) { 370 si.si_signo = SIGSEGV; 371 si.si_code = SEGV_ACCERR; 372 break; 373 } 374 375 /* probably address is outside of mapped file */ 376 /* fall through */ 377 case 17: /* NA data TLB miss / page fault */ 378 case 18: /* Unaligned access - PCXS only */ 379 si.si_signo = SIGBUS; 380 si.si_code = (code == 18) ? BUS_ADRALN : BUS_ADRERR; 381 break; 382 case 16: /* Non-access instruction TLB miss fault */ 383 case 26: /* PCXL: Data memory access rights trap */ 384 default: 385 si.si_signo = SIGSEGV; 386 si.si_code = (code == 26) ? SEGV_ACCERR : SEGV_MAPERR; 387 break; 388 } 389 si.si_errno = 0; 390 si.si_addr = (void __user *) address; 391 force_sig_info(si.si_signo, &si, current); 392 return; 393 } 394 395 no_context: 396 397 if (!user_mode(regs) && fixup_exception(regs)) { 398 return; 399 } 400 401 parisc_terminate("Bad Address (null pointer deref?)", regs, code, address); 402 403 out_of_memory: 404 up_read(&mm->mmap_sem); 405 if (!user_mode(regs)) 406 goto no_context; 407 pagefault_out_of_memory(); 408 } 409