1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Linux/PA-RISC Project (http://www.parisc-linux.org/) 4 * 5 * Floating-point emulation code 6 * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org> 7 */ 8 /* 9 * BEGIN_DESC 10 * 11 * File: 12 * @(#) pa/spmath/float.h $Revision: 1.1 $ 13 * 14 * Purpose: 15 * <<please update with a synopis of the functionality provided by this file>> 16 * 17 * BE header: no 18 * 19 * Shipped: yes 20 * /usr/conf/pa/spmath/float.h 21 * 22 * END_DESC 23 */ 24 25 #ifdef __NO_PA_HDRS 26 PA header file -- do not include this header file for non-PA builds. 27 #endif 28 29 #include "fpbits.h" 30 #include "hppa.h" 31 /* 32 * Want to pick up the FPU capability flags, not the PDC structures. 33 * 'LOCORE' isn't really true in this case, but we don't want the C structures 34 * so it suits our purposes 35 */ 36 #define LOCORE 37 #include "fpu.h" 38 39 /* 40 * Declare the basic structures for the 3 different 41 * floating-point precisions. 42 * 43 * Single number 44 * +-------+-------+-------+-------+-------+-------+-------+-------+ 45 * |s| exp | mantissa | 46 * +-------+-------+-------+-------+-------+-------+-------+-------+ 47 */ 48 #define Sall(object) (object) 49 #define Ssign(object) Bitfield_extract( 0, 1,object) 50 #define Ssignedsign(object) Bitfield_signed_extract( 0, 1,object) 51 #define Sexponent(object) Bitfield_extract( 1, 8,object) 52 #define Smantissa(object) Bitfield_mask( 9, 23,object) 53 #define Ssignaling(object) Bitfield_extract( 9, 1,object) 54 #define Ssignalingnan(object) Bitfield_extract( 1, 9,object) 55 #define Shigh2mantissa(object) Bitfield_extract( 9, 2,object) 56 #define Sexponentmantissa(object) Bitfield_mask( 1, 31,object) 57 #define Ssignexponent(object) Bitfield_extract( 0, 9,object) 58 #define Shidden(object) Bitfield_extract( 8, 1,object) 59 #define Shiddenoverflow(object) Bitfield_extract( 7, 1,object) 60 #define Shiddenhigh7mantissa(object) Bitfield_extract( 8, 8,object) 61 #define Shiddenhigh3mantissa(object) Bitfield_extract( 8, 4,object) 62 #define Slow(object) Bitfield_mask( 31, 1,object) 63 #define Slow4(object) Bitfield_mask( 28, 4,object) 64 #define Slow31(object) Bitfield_mask( 1, 31,object) 65 #define Shigh31(object) Bitfield_extract( 0, 31,object) 66 #define Ssignedhigh31(object) Bitfield_signed_extract( 0, 31,object) 67 #define Shigh4(object) Bitfield_extract( 0, 4,object) 68 #define Sbit24(object) Bitfield_extract( 24, 1,object) 69 #define Sbit28(object) Bitfield_extract( 28, 1,object) 70 #define Sbit29(object) Bitfield_extract( 29, 1,object) 71 #define Sbit30(object) Bitfield_extract( 30, 1,object) 72 #define Sbit31(object) Bitfield_mask( 31, 1,object) 73 74 #define Deposit_ssign(object,value) Bitfield_deposit(value,0,1,object) 75 #define Deposit_sexponent(object,value) Bitfield_deposit(value,1,8,object) 76 #define Deposit_smantissa(object,value) Bitfield_deposit(value,9,23,object) 77 #define Deposit_shigh2mantissa(object,value) Bitfield_deposit(value,9,2,object) 78 #define Deposit_sexponentmantissa(object,value) \ 79 Bitfield_deposit(value,1,31,object) 80 #define Deposit_ssignexponent(object,value) Bitfield_deposit(value,0,9,object) 81 #define Deposit_slow(object,value) Bitfield_deposit(value,31,1,object) 82 #define Deposit_shigh4(object,value) Bitfield_deposit(value,0,4,object) 83 84 #define Is_ssign(object) Bitfield_mask( 0, 1,object) 85 #define Is_ssignaling(object) Bitfield_mask( 9, 1,object) 86 #define Is_shidden(object) Bitfield_mask( 8, 1,object) 87 #define Is_shiddenoverflow(object) Bitfield_mask( 7, 1,object) 88 #define Is_slow(object) Bitfield_mask( 31, 1,object) 89 #define Is_sbit24(object) Bitfield_mask( 24, 1,object) 90 #define Is_sbit28(object) Bitfield_mask( 28, 1,object) 91 #define Is_sbit29(object) Bitfield_mask( 29, 1,object) 92 #define Is_sbit30(object) Bitfield_mask( 30, 1,object) 93 #define Is_sbit31(object) Bitfield_mask( 31, 1,object) 94 95 /* 96 * Double number. 97 * +-------+-------+-------+-------+-------+-------+-------+-------+ 98 * |s| exponent | mantissa part 1 | 99 * +-------+-------+-------+-------+-------+-------+-------+-------+ 100 * 101 * +-------+-------+-------+-------+-------+-------+-------+-------+ 102 * | mantissa part 2 | 103 * +-------+-------+-------+-------+-------+-------+-------+-------+ 104 */ 105 #define Dallp1(object) (object) 106 #define Dsign(object) Bitfield_extract( 0, 1,object) 107 #define Dsignedsign(object) Bitfield_signed_extract( 0, 1,object) 108 #define Dexponent(object) Bitfield_extract( 1, 11,object) 109 #define Dmantissap1(object) Bitfield_mask( 12, 20,object) 110 #define Dsignaling(object) Bitfield_extract( 12, 1,object) 111 #define Dsignalingnan(object) Bitfield_extract( 1, 12,object) 112 #define Dhigh2mantissa(object) Bitfield_extract( 12, 2,object) 113 #define Dexponentmantissap1(object) Bitfield_mask( 1, 31,object) 114 #define Dsignexponent(object) Bitfield_extract( 0, 12,object) 115 #define Dhidden(object) Bitfield_extract( 11, 1,object) 116 #define Dhiddenoverflow(object) Bitfield_extract( 10, 1,object) 117 #define Dhiddenhigh7mantissa(object) Bitfield_extract( 11, 8,object) 118 #define Dhiddenhigh3mantissa(object) Bitfield_extract( 11, 4,object) 119 #define Dlowp1(object) Bitfield_mask( 31, 1,object) 120 #define Dlow31p1(object) Bitfield_mask( 1, 31,object) 121 #define Dhighp1(object) Bitfield_extract( 0, 1,object) 122 #define Dhigh4p1(object) Bitfield_extract( 0, 4,object) 123 #define Dhigh31p1(object) Bitfield_extract( 0, 31,object) 124 #define Dsignedhigh31p1(object) Bitfield_signed_extract( 0, 31,object) 125 #define Dbit3p1(object) Bitfield_extract( 3, 1,object) 126 127 #define Deposit_dsign(object,value) Bitfield_deposit(value,0,1,object) 128 #define Deposit_dexponent(object,value) Bitfield_deposit(value,1,11,object) 129 #define Deposit_dmantissap1(object,value) Bitfield_deposit(value,12,20,object) 130 #define Deposit_dhigh2mantissa(object,value) Bitfield_deposit(value,12,2,object) 131 #define Deposit_dexponentmantissap1(object,value) \ 132 Bitfield_deposit(value,1,31,object) 133 #define Deposit_dsignexponent(object,value) Bitfield_deposit(value,0,12,object) 134 #define Deposit_dlowp1(object,value) Bitfield_deposit(value,31,1,object) 135 #define Deposit_dhigh4p1(object,value) Bitfield_deposit(value,0,4,object) 136 137 #define Is_dsign(object) Bitfield_mask( 0, 1,object) 138 #define Is_dsignaling(object) Bitfield_mask( 12, 1,object) 139 #define Is_dhidden(object) Bitfield_mask( 11, 1,object) 140 #define Is_dhiddenoverflow(object) Bitfield_mask( 10, 1,object) 141 #define Is_dlowp1(object) Bitfield_mask( 31, 1,object) 142 #define Is_dhighp1(object) Bitfield_mask( 0, 1,object) 143 #define Is_dbit3p1(object) Bitfield_mask( 3, 1,object) 144 145 #define Dallp2(object) (object) 146 #define Dmantissap2(object) (object) 147 #define Dlowp2(object) Bitfield_mask( 31, 1,object) 148 #define Dlow4p2(object) Bitfield_mask( 28, 4,object) 149 #define Dlow31p2(object) Bitfield_mask( 1, 31,object) 150 #define Dhighp2(object) Bitfield_extract( 0, 1,object) 151 #define Dhigh31p2(object) Bitfield_extract( 0, 31,object) 152 #define Dbit2p2(object) Bitfield_extract( 2, 1,object) 153 #define Dbit3p2(object) Bitfield_extract( 3, 1,object) 154 #define Dbit21p2(object) Bitfield_extract( 21, 1,object) 155 #define Dbit28p2(object) Bitfield_extract( 28, 1,object) 156 #define Dbit29p2(object) Bitfield_extract( 29, 1,object) 157 #define Dbit30p2(object) Bitfield_extract( 30, 1,object) 158 #define Dbit31p2(object) Bitfield_mask( 31, 1,object) 159 160 #define Deposit_dlowp2(object,value) Bitfield_deposit(value,31,1,object) 161 162 #define Is_dlowp2(object) Bitfield_mask( 31, 1,object) 163 #define Is_dhighp2(object) Bitfield_mask( 0, 1,object) 164 #define Is_dbit2p2(object) Bitfield_mask( 2, 1,object) 165 #define Is_dbit3p2(object) Bitfield_mask( 3, 1,object) 166 #define Is_dbit21p2(object) Bitfield_mask( 21, 1,object) 167 #define Is_dbit28p2(object) Bitfield_mask( 28, 1,object) 168 #define Is_dbit29p2(object) Bitfield_mask( 29, 1,object) 169 #define Is_dbit30p2(object) Bitfield_mask( 30, 1,object) 170 #define Is_dbit31p2(object) Bitfield_mask( 31, 1,object) 171 172 /* 173 * Quad number. 174 * +-------+-------+-------+-------+-------+-------+-------+-------+ 175 * |s| exponent | mantissa part 1 | 176 * +-------+-------+-------+-------+-------+-------+-------+-------+ 177 * 178 * +-------+-------+-------+-------+-------+-------+-------+-------+ 179 * | mantissa part 2 | 180 * +-------+-------+-------+-------+-------+-------+-------+-------+ 181 * 182 * +-------+-------+-------+-------+-------+-------+-------+-------+ 183 * | mantissa part 3 | 184 * +-------+-------+-------+-------+-------+-------+-------+-------+ 185 * 186 * +-------+-------+-------+-------+-------+-------+-------+-------+ 187 * | mantissa part 4 | 188 * +-------+-------+-------+-------+-------+-------+-------+-------+ 189 */ 190 typedef struct 191 { 192 union 193 { 194 struct { unsigned qallp1; } u_qallp1; 195 /* Not needed for now... 196 Bitfield_extract( 0, 1,u_qsign,qsign) 197 Bitfield_signed_extract( 0, 1,u_qsignedsign,qsignedsign) 198 Bitfield_extract( 1, 15,u_qexponent,qexponent) 199 Bitfield_extract(16, 16,u_qmantissap1,qmantissap1) 200 Bitfield_extract(16, 1,u_qsignaling,qsignaling) 201 Bitfield_extract(1, 16,u_qsignalingnan,qsignalingnan) 202 Bitfield_extract(16, 2,u_qhigh2mantissa,qhigh2mantissa) 203 Bitfield_extract( 1, 31,u_qexponentmantissap1,qexponentmantissap1) 204 Bitfield_extract( 0, 16,u_qsignexponent,qsignexponent) 205 Bitfield_extract(15, 1,u_qhidden,qhidden) 206 Bitfield_extract(14, 1,u_qhiddenoverflow,qhiddenoverflow) 207 Bitfield_extract(15, 8,u_qhiddenhigh7mantissa,qhiddenhigh7mantissa) 208 Bitfield_extract(15, 4,u_qhiddenhigh3mantissa,qhiddenhigh3mantissa) 209 Bitfield_extract(31, 1,u_qlowp1,qlowp1) 210 Bitfield_extract( 1, 31,u_qlow31p1,qlow31p1) 211 Bitfield_extract( 0, 1,u_qhighp1,qhighp1) 212 Bitfield_extract( 0, 4,u_qhigh4p1,qhigh4p1) 213 Bitfield_extract( 0, 31,u_qhigh31p1,qhigh31p1) 214 */ 215 } quad_u1; 216 union 217 { 218 struct { unsigned qallp2; } u_qallp2; 219 /* Not needed for now... 220 Bitfield_extract(31, 1,u_qlowp2,qlowp2) 221 Bitfield_extract( 1, 31,u_qlow31p2,qlow31p2) 222 Bitfield_extract( 0, 1,u_qhighp2,qhighp2) 223 Bitfield_extract( 0, 31,u_qhigh31p2,qhigh31p2) 224 */ 225 } quad_u2; 226 union 227 { 228 struct { unsigned qallp3; } u_qallp3; 229 /* Not needed for now... 230 Bitfield_extract(31, 1,u_qlowp3,qlowp3) 231 Bitfield_extract( 1, 31,u_qlow31p3,qlow31p3) 232 Bitfield_extract( 0, 1,u_qhighp3,qhighp3) 233 Bitfield_extract( 0, 31,u_qhigh31p3,qhigh31p3) 234 */ 235 } quad_u3; 236 union 237 { 238 struct { unsigned qallp4; } u_qallp4; 239 /* Not need for now... 240 Bitfield_extract(31, 1,u_qlowp4,qlowp4) 241 Bitfield_extract( 1, 31,u_qlow31p4,qlow31p4) 242 Bitfield_extract( 0, 1,u_qhighp4,qhighp4) 243 Bitfield_extract( 0, 31,u_qhigh31p4,qhigh31p4) 244 */ 245 } quad_u4; 246 } quad_floating_point; 247 248 /* Extension - An additional structure to hold the guard, round and 249 * sticky bits during computations. 250 */ 251 #define Extall(object) (object) 252 #define Extsign(object) Bitfield_extract( 0, 1,object) 253 #define Exthigh31(object) Bitfield_extract( 0, 31,object) 254 #define Extlow31(object) Bitfield_extract( 1, 31,object) 255 #define Extlow(object) Bitfield_extract( 31, 1,object) 256 257 /* 258 * Single extended - The upper word is just like single precision, 259 * but one additional word of mantissa is needed. 260 */ 261 #define Sextallp1(object) (object) 262 #define Sextallp2(object) (object) 263 #define Sextlowp1(object) Bitfield_extract( 31, 1,object) 264 #define Sexthighp2(object) Bitfield_extract( 0, 1,object) 265 #define Sextlow31p2(object) Bitfield_extract( 1, 31,object) 266 #define Sexthiddenoverflow(object) Bitfield_extract( 4, 1,object) 267 #define Is_sexthiddenoverflow(object) Bitfield_mask( 4, 1,object) 268 269 /* 270 * Double extended - The upper two words are just like double precision, 271 * but two additional words of mantissa are needed. 272 */ 273 #define Dextallp1(object) (object) 274 #define Dextallp2(object) (object) 275 #define Dextallp3(object) (object) 276 #define Dextallp4(object) (object) 277 #define Dextlowp2(object) Bitfield_extract( 31, 1,object) 278 #define Dexthighp3(object) Bitfield_extract( 0, 1,object) 279 #define Dextlow31p3(object) Bitfield_extract( 1, 31,object) 280 #define Dexthiddenoverflow(object) Bitfield_extract( 10, 1,object) 281 #define Is_dexthiddenoverflow(object) Bitfield_mask( 10, 1,object) 282 #define Deposit_dextlowp4(object,value) Bitfield_deposit(value,31,1,object) 283 284 /* 285 * Declare the basic structures for the 3 different 286 * fixed-point precisions. 287 * 288 * Single number 289 * +-------+-------+-------+-------+-------+-------+-------+-------+ 290 * |s| integer | 291 * +-------+-------+-------+-------+-------+-------+-------+-------+ 292 */ 293 typedef int sgl_integer; 294 295 /* 296 * Double number. 297 * +-------+-------+-------+-------+-------+-------+-------+-------+ 298 * |s| high integer | 299 * +-------+-------+-------+-------+-------+-------+-------+-------+ 300 * 301 * +-------+-------+-------+-------+-------+-------+-------+-------+ 302 * | low integer | 303 * +-------+-------+-------+-------+-------+-------+-------+-------+ 304 */ 305 struct dint { 306 int wd0; 307 unsigned int wd1; 308 }; 309 310 struct dblwd { 311 unsigned int wd0; 312 unsigned int wd1; 313 }; 314 315 /* 316 * Quad number. 317 * +-------+-------+-------+-------+-------+-------+-------+-------+ 318 * |s| integer part1 | 319 * +-------+-------+-------+-------+-------+-------+-------+-------+ 320 * 321 * +-------+-------+-------+-------+-------+-------+-------+-------+ 322 * | integer part 2 | 323 * +-------+-------+-------+-------+-------+-------+-------+-------+ 324 * 325 * +-------+-------+-------+-------+-------+-------+-------+-------+ 326 * | integer part 3 | 327 * +-------+-------+-------+-------+-------+-------+-------+-------+ 328 * 329 * +-------+-------+-------+-------+-------+-------+-------+-------+ 330 * | integer part 4 | 331 * +-------+-------+-------+-------+-------+-------+-------+-------+ 332 */ 333 334 struct quadwd { 335 int wd0; 336 unsigned int wd1; 337 unsigned int wd2; 338 unsigned int wd3; 339 }; 340 341 typedef struct quadwd quad_integer; 342 343 344 /* useful typedefs */ 345 typedef unsigned int sgl_floating_point; 346 typedef struct dblwd dbl_floating_point; 347 typedef struct dint dbl_integer; 348 typedef struct dblwd dbl_unsigned; 349 350 /* 351 * Define the different precisions' parameters. 352 */ 353 #define SGL_BITLENGTH 32 354 #define SGL_EMAX 127 355 #define SGL_EMIN (-126) 356 #define SGL_BIAS 127 357 #define SGL_WRAP 192 358 #define SGL_INFINITY_EXPONENT (SGL_EMAX+SGL_BIAS+1) 359 #define SGL_THRESHOLD 32 360 #define SGL_EXP_LENGTH 8 361 #define SGL_P 24 362 363 #define DBL_BITLENGTH 64 364 #define DBL_EMAX 1023 365 #define DBL_EMIN (-1022) 366 #define DBL_BIAS 1023 367 #define DBL_WRAP 1536 368 #define DBL_INFINITY_EXPONENT (DBL_EMAX+DBL_BIAS+1) 369 #define DBL_THRESHOLD 64 370 #define DBL_EXP_LENGTH 11 371 #define DBL_P 53 372 373 #define QUAD_BITLENGTH 128 374 #define QUAD_EMAX 16383 375 #define QUAD_EMIN (-16382) 376 #define QUAD_BIAS 16383 377 #define QUAD_WRAP 24576 378 #define QUAD_INFINITY_EXPONENT (QUAD_EMAX+QUAD_BIAS+1) 379 #define QUAD_P 113 380 381 /* Boolean Values etc. */ 382 #define FALSE 0 383 #define TRUE (!FALSE) 384 #define NOT ! 385 #define XOR ^ 386 387 /* other constants */ 388 #undef NULL 389 #define NULL 0 390 #define NIL 0 391 #define SGL 0 392 #define DBL 1 393 #define BADFMT 2 394 #define QUAD 3 395 396 397 /* Types */ 398 typedef int boolean; 399 typedef int FORMAT; 400 typedef int VOID; 401 402 403 /* Declare status register equivalent to FPUs architecture. 404 * 405 * 0 1 2 3 4 5 6 7 8 910 1 2 3 4 5 6 7 8 920 1 2 3 4 5 6 7 8 930 1 406 * +-------+-------+-------+-------+-------+-------+-------+-------+ 407 * |V|Z|O|U|I|C| rsv | model | version |RM |rsv|T|r|V|Z|O|U|I| 408 * +-------+-------+-------+-------+-------+-------+-------+-------+ 409 */ 410 #define Cbit(object) Bitfield_extract( 5, 1,object) 411 #define Tbit(object) Bitfield_extract( 25, 1,object) 412 #define Roundingmode(object) Bitfield_extract( 21, 2,object) 413 #define Invalidtrap(object) Bitfield_extract( 27, 1,object) 414 #define Divisionbyzerotrap(object) Bitfield_extract( 28, 1,object) 415 #define Overflowtrap(object) Bitfield_extract( 29, 1,object) 416 #define Underflowtrap(object) Bitfield_extract( 30, 1,object) 417 #define Inexacttrap(object) Bitfield_extract( 31, 1,object) 418 #define Invalidflag(object) Bitfield_extract( 0, 1,object) 419 #define Divisionbyzeroflag(object) Bitfield_extract( 1, 1,object) 420 #define Overflowflag(object) Bitfield_extract( 2, 1,object) 421 #define Underflowflag(object) Bitfield_extract( 3, 1,object) 422 #define Inexactflag(object) Bitfield_extract( 4, 1,object) 423 #define Allflags(object) Bitfield_extract( 0, 5,object) 424 425 /* Definitions relevant to the status register */ 426 427 /* Rounding Modes */ 428 #define ROUNDNEAREST 0 429 #define ROUNDZERO 1 430 #define ROUNDPLUS 2 431 #define ROUNDMINUS 3 432 433 /* Exceptions */ 434 #define NOEXCEPTION 0x0 435 #define INVALIDEXCEPTION 0x20 436 #define DIVISIONBYZEROEXCEPTION 0x10 437 #define OVERFLOWEXCEPTION 0x08 438 #define UNDERFLOWEXCEPTION 0x04 439 #define INEXACTEXCEPTION 0x02 440 #define UNIMPLEMENTEDEXCEPTION 0x01 441 442 /* New exceptions for the 2E Opcode */ 443 #define OPC_2E_INVALIDEXCEPTION 0x30 444 #define OPC_2E_OVERFLOWEXCEPTION 0x18 445 #define OPC_2E_UNDERFLOWEXCEPTION 0x0c 446 #define OPC_2E_INEXACTEXCEPTION 0x12 447 448 /* Declare exception registers equivalent to FPUs architecture 449 * 450 * 0 1 2 3 4 5 6 7 8 910 1 2 3 4 5 6 7 8 920 1 2 3 4 5 6 7 8 930 1 451 * +-------+-------+-------+-------+-------+-------+-------+-------+ 452 * |excepttype | r1 | r2/ext | operation |parm |n| t/cond | 453 * +-------+-------+-------+-------+-------+-------+-------+-------+ 454 */ 455 #define Allexception(object) (object) 456 #define Exceptiontype(object) Bitfield_extract( 0, 6,object) 457 #define Instructionfield(object) Bitfield_mask( 6,26,object) 458 #define Parmfield(object) Bitfield_extract( 23, 3,object) 459 #define Rabit(object) Bitfield_extract( 24, 1,object) 460 #define Ibit(object) Bitfield_extract( 25, 1,object) 461 462 #define Set_exceptiontype(object,value) Bitfield_deposit(value, 0, 6,object) 463 #define Set_parmfield(object,value) Bitfield_deposit(value, 23, 3,object) 464 #define Set_exceptiontype_and_instr_field(exception,instruction,object) \ 465 object = exception << 26 | instruction 466 467 /* Declare the condition field 468 * 469 * 0 1 2 3 4 5 6 7 8 910 1 2 3 4 5 6 7 8 920 1 2 3 4 5 6 7 8 930 1 470 * +-------+-------+-------+-------+-------+-------+-------+-------+ 471 * | |G|L|E|U|X| 472 * +-------+-------+-------+-------+-------+-------+-------+-------+ 473 */ 474 #define Greaterthanbit(object) Bitfield_extract( 27, 1,object) 475 #define Lessthanbit(object) Bitfield_extract( 28, 1,object) 476 #define Equalbit(object) Bitfield_extract( 29, 1,object) 477 #define Unorderedbit(object) Bitfield_extract( 30, 1,object) 478 #define Exceptionbit(object) Bitfield_extract( 31, 1,object) 479 480 /* An alias name for the status register */ 481 #define Fpustatus_register (*status) 482 483 /************************************************** 484 * Status register referencing and manipulation. * 485 **************************************************/ 486 487 /* Rounding mode */ 488 #define Rounding_mode() Roundingmode(Fpustatus_register) 489 #define Is_rounding_mode(rmode) \ 490 (Roundingmode(Fpustatus_register) == rmode) 491 #define Set_rounding_mode(value) \ 492 Bitfield_deposit(value,21,2,Fpustatus_register) 493 494 /* Boolean testing of the trap enable bits */ 495 #define Is_invalidtrap_enabled() Invalidtrap(Fpustatus_register) 496 #define Is_divisionbyzerotrap_enabled() Divisionbyzerotrap(Fpustatus_register) 497 #define Is_overflowtrap_enabled() Overflowtrap(Fpustatus_register) 498 #define Is_underflowtrap_enabled() Underflowtrap(Fpustatus_register) 499 #define Is_inexacttrap_enabled() Inexacttrap(Fpustatus_register) 500 501 /* Set the indicated flags in the status register */ 502 #define Set_invalidflag() Bitfield_deposit(1,0,1,Fpustatus_register) 503 #define Set_divisionbyzeroflag() Bitfield_deposit(1,1,1,Fpustatus_register) 504 #define Set_overflowflag() Bitfield_deposit(1,2,1,Fpustatus_register) 505 #define Set_underflowflag() Bitfield_deposit(1,3,1,Fpustatus_register) 506 #define Set_inexactflag() Bitfield_deposit(1,4,1,Fpustatus_register) 507 508 #define Clear_all_flags() Bitfield_deposit(0,0,5,Fpustatus_register) 509 510 /* Manipulate the trap and condition code bits (tbit and cbit) */ 511 #define Set_tbit() Bitfield_deposit(1,25,1,Fpustatus_register) 512 #define Clear_tbit() Bitfield_deposit(0,25,1,Fpustatus_register) 513 #define Is_tbit_set() Tbit(Fpustatus_register) 514 #define Is_cbit_set() Cbit(Fpustatus_register) 515 516 #define Set_status_cbit(value) \ 517 Bitfield_deposit(value,5,1,Fpustatus_register) 518 519 /******************************* 520 * Condition field referencing * 521 *******************************/ 522 #define Unordered(cond) Unorderedbit(cond) 523 #define Equal(cond) Equalbit(cond) 524 #define Lessthan(cond) Lessthanbit(cond) 525 #define Greaterthan(cond) Greaterthanbit(cond) 526 #define Exception(cond) Exceptionbit(cond) 527 528 529 /* Defines for the extension */ 530 #define Ext_isone_sign(extent) (Extsign(extent)) 531 #define Ext_isnotzero(extent) \ 532 (Extall(extent)) 533 #define Ext_isnotzero_lower(extent) \ 534 (Extlow31(extent)) 535 #define Ext_leftshiftby1(extent) \ 536 Extall(extent) <<= 1 537 #define Ext_negate(extent) \ 538 (int )Extall(extent) = 0 - (int )Extall(extent) 539 #define Ext_setone_low(extent) Bitfield_deposit(1,31,1,extent) 540 #define Ext_setzero(extent) Extall(extent) = 0 541 542 typedef int operation; 543 544 /* error messages */ 545 546 #define NONE 0 547 #define UNDEFFPINST 1 548 549 /* Function definitions: opcode, opclass */ 550 #define FTEST (1<<2) | 0 551 #define FCPY (2<<2) | 0 552 #define FABS (3<<2) | 0 553 #define FSQRT (4<<2) | 0 554 #define FRND (5<<2) | 0 555 556 #define FCNVFF (0<<2) | 1 557 #define FCNVXF (1<<2) | 1 558 #define FCNVFX (2<<2) | 1 559 #define FCNVFXT (3<<2) | 1 560 561 #define FCMP (0<<2) | 2 562 563 #define FADD (0<<2) | 3 564 #define FSUB (1<<2) | 3 565 #define FMPY (2<<2) | 3 566 #define FDIV (3<<2) | 3 567 #define FREM (4<<2) | 3 568 569